9e9b5acb9c
5604f239-x86-PV-properly-populate-descriptor-tables.patch 561bbc8b-VT-d-don-t-suppress-invalidation-address-write-when-0.patch 561d2046-VT-d-use-proper-error-codes-in-iommu_enable_x2apic_IR.patch 561d20a0-x86-hide-MWAITX-from-PV-domains.patch 561e3283-x86-NUMA-fix-SRAT-table-processor-entry-handling.patch - bsc#951845 - VUL-0: CVE-2015-7972: xen: x86: populate-on-demand balloon size inaccuracy can crash guests (XSA-153) xsa153-libxl.patch - bsc#950703 - VUL-1: CVE-2015-7969: xen: leak of main per-domain vcpu pointer array (DoS) (XSA-149) xsa149.patch - bsc#950705 - VUL-1: CVE-2015-7969: xen: x86: leak of per-domain profiling-related vcpu pointer array (DoS) (XSA-151) xsa151.patch - bsc#950706 - VUL-0: CVE-2015-7971: xen: x86: some pmu and profiling hypercalls log without rate limiting (XSA-152) xsa152.patch - Dropped 55dc7937-x86-IO-APIC-don-t-create-pIRQ-mapping-from-masked-RTE.patch 5604f239-x86-PV-properly-populate-descriptor-tables.patch - bsc#932267 - VUL-1: CVE-2015-4037: qemu,kvm,xen: insecure temporary file use in /net/slirp.c CVE-2015-4037-qemuu-smb-config-dir-name.patch CVE-2015-4037-qemut-smb-config-dir-name.patch - bsc#877642 - VUL-0: CVE-2014-0222: qemu: qcow1: validate L2 table size to avoid integer overflows OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=382
33 lines
1.4 KiB
Diff
33 lines
1.4 KiB
Diff
# Commit 941cd44324db7eddc46cba4596fa13d505066ccf
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# Date 2015-10-13 17:17:52 +0200
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# Author Jan Beulich <jbeulich@suse.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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x86: hide MWAITX from PV domains
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Since MWAIT is hidden too. (Linux starting with 4.3 is making use of
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that feature, and is checking for it without looking at the MWAIT one.)
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Andrew Cooper <andrew.cooper3@citrix.com>
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--- a/xen/arch/x86/traps.c
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+++ b/xen/arch/x86/traps.c
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@@ -904,6 +904,7 @@ void pv_cpuid(struct cpu_user_regs *regs
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__clear_bit(X86_FEATURE_LWP % 32, &c);
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__clear_bit(X86_FEATURE_NODEID_MSR % 32, &c);
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__clear_bit(X86_FEATURE_TOPOEXT % 32, &c);
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+ __clear_bit(X86_FEATURE_MWAITX % 32, &c);
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break;
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case 0x00000005: /* MONITOR/MWAIT */
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--- a/xen/include/asm-x86/cpufeature.h
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+++ b/xen/include/asm-x86/cpufeature.h
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@@ -137,6 +137,7 @@
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#define X86_FEATURE_TBM (6*32+21) /* trailing bit manipulations */
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#define X86_FEATURE_TOPOEXT (6*32+22) /* topology extensions CPUID leafs */
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#define X86_FEATURE_DBEXT (6*32+26) /* data breakpoint extension */
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+#define X86_FEATURE_MWAITX (6*32+29) /* MWAIT extension (MONITORX/MWAITX) */
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/* Intel-defined CPU features, CPUID level 0x00000007:0 (ebx), word 7 */
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#define X86_FEATURE_FSGSBASE (7*32+ 0) /* {RD,WR}{FS,GS}BASE instructions */
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