763b78040d
config handling stack overflow CVE-2015-3259-xsa137.patch - Upstream patches from Jan 558bfaa0-x86-traps-avoid-using-current-too-early.patch 5592a116-nested-EPT-fix-the-handling-of-nested-EPT.patch 559b9dd6-x86-p2m-ept-don-t-unmap-in-use-EPT-pagetable.patch 559bdde5-pull-in-latest-linux-earlycpio.patch - Upstream patches from Jan pending review 552d0fd2-x86-hvm-don-t-include-asm-spinlock-h.patch 552d0fe8-x86-mtrr-include-asm-atomic.h.patch 552d293b-x86-vMSI-X-honor-all-mask-requests.patch 552d2966-x86-vMSI-X-add-valid-bits-for-read-acceleration.patch 554c7aee-x86-provide-arch_fetch_and_add.patch 554c7b00-arm-provide-arch_fetch_and_add.patch 55534b0a-x86-provide-add_sized.patch 55534b25-arm-provide-add_sized.patch 5555a4f8-use-ticket-locks-for-spin-locks.patch 5555a5b9-x86-arm-remove-asm-spinlock-h.patch 5555a8ec-introduce-non-contiguous-allocation.patch 55795a52-x86-vMSI-X-support-qword-MMIO-access.patch 557eb55f-gnttab-per-active-entry-locking.patch 557eb5b6-gnttab-introduce-maptrack-lock.patch 557eb620-gnttab-make-the-grant-table-lock-a-read-write-lock.patch 557ffab8-evtchn-factor-out-freeing-an-event-channel.patch 5582bf43-evtchn-simplify-port_is_valid.patch 5582bf81-evtchn-remove-the-locking-when-unmasking-an-event-channel.patch 5583d9c5-x86-MSI-X-cleanup.patch 5583da09-x86-MSI-track-host-and-guest-masking-separately.patch 5583da64-gnttab-use-per-VCPU-maptrack-free-lists.patch OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=369
49 lines
1.4 KiB
Diff
49 lines
1.4 KiB
Diff
x86/MSI: properly track guest masking requests
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... by monitoring writes to the mask register.
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This allows reverting the main effect of the XSA-129 patches in qemu.
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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--- sle12sp1.orig/xen/arch/x86/msi.c 2015-07-07 18:01:41.000000000 +0200
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+++ sle12sp1/xen/arch/x86/msi.c 2015-07-07 18:01:47.000000000 +0200
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@@ -1303,6 +1303,37 @@ int pci_msi_conf_write_intercept(struct
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return 1;
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}
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+ entry = find_msi_entry(pdev, -1, PCI_CAP_ID_MSI);
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+ if ( entry && entry->msi_attrib.maskbit )
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+ {
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+ uint16_t cntl;
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+ uint32_t unused;
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+
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+ pos = entry->msi_attrib.pos;
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+ if ( reg < pos || reg >= entry->msi.mpos + 8 )
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+ return 0;
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+
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+ if ( reg == msi_control_reg(pos) )
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+ return size == 2 ? 1 : -EACCES;
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+ if ( reg < entry->msi.mpos || reg >= entry->msi.mpos + 4 || size != 4 )
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+ return -EACCES;
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+
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+ cntl = pci_conf_read16(seg, bus, slot, func, msi_control_reg(pos));
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+ unused = ~(uint32_t)0 >> (32 - multi_msi_capable(cntl));
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+ for ( pos = 0; pos < entry->msi.nvec; ++pos, ++entry )
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+ {
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+ entry->msi_attrib.guest_masked =
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+ *data >> entry->msi_attrib.entry_nr;
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+ if ( entry->msi_attrib.host_masked )
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+ *data |= 1 << pos;
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+ unused &= ~(1 << pos);
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+ }
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+
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+ *data |= unused;
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+
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+ return 1;
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+ }
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+
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return 0;
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}
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