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xen/x86_emulate-eflags.patch

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Index: xen-3.2-testing/xen/arch/x86/x86_emulate.c
===================================================================
--- xen-3.2-testing.orig/xen/arch/x86/x86_emulate.c
+++ xen-3.2-testing/xen/arch/x86/x86_emulate.c
@@ -280,24 +280,6 @@ struct operand {
#define CR0_PE (1<<0)
#define CR4_TSD (1<<2)
-/* EFLAGS bit definitions. */
-#define EFLG_VIP (1<<20)
-#define EFLG_VIF (1<<19)
-#define EFLG_AC (1<<18)
-#define EFLG_VM (1<<17)
-#define EFLG_RF (1<<16)
-#define EFLG_NT (1<<14)
-#define EFLG_IOPL (3<<12)
-#define EFLG_OF (1<<11)
-#define EFLG_DF (1<<10)
-#define EFLG_IF (1<<9)
-#define EFLG_TF (1<<8)
-#define EFLG_SF (1<<7)
-#define EFLG_ZF (1<<6)
-#define EFLG_AF (1<<4)
-#define EFLG_PF (1<<2)
-#define EFLG_CF (1<<0)
-
/* Exception definitions. */
#define EXC_DE 0
#define EXC_DB 1
@@ -328,7 +310,7 @@ struct operand {
* These EFLAGS bits are restored from saved value during emulation, and
* any changes are written back to the saved value after emulation.
*/
-#define EFLAGS_MASK (EFLG_OF|EFLG_SF|EFLG_ZF|EFLG_AF|EFLG_PF|EFLG_CF)
+#define EFLAGS_MASK (EF_OF|EF_SF|EF_ZF|EF_AF|EF_PF|EF_CF)
/* Before executing instruction: restore necessary bits in EFLAGS. */
#define _PRE_EFLAGS(_sav, _msk, _tmp) \
@@ -680,28 +662,28 @@ test_cc(
switch ( (condition & 15) >> 1 )
{
case 0: /* o */
- rc |= (flags & EFLG_OF);
+ rc |= (flags & EF_OF);
break;
case 1: /* b/c/nae */
- rc |= (flags & EFLG_CF);
+ rc |= (flags & EF_CF);
break;
case 2: /* z/e */
- rc |= (flags & EFLG_ZF);
+ rc |= (flags & EF_ZF);
break;
case 3: /* be/na */
- rc |= (flags & (EFLG_CF|EFLG_ZF));
+ rc |= (flags & (EF_CF|EF_ZF));
break;
case 4: /* s */
- rc |= (flags & EFLG_SF);
+ rc |= (flags & EF_SF);
break;
case 5: /* p/pe */
- rc |= (flags & EFLG_PF);
+ rc |= (flags & EF_PF);
break;
case 7: /* le/ng */
- rc |= (flags & EFLG_ZF);
+ rc |= (flags & EF_ZF);
/* fall through */
case 6: /* l/nge */
- rc |= (!(flags & EFLG_SF) != !(flags & EFLG_OF));
+ rc |= (!(flags & EF_SF) != !(flags & EF_OF));
break;
}
@@ -716,7 +698,7 @@ get_cpl(
{
struct segment_register reg;
- if ( ctxt->regs->eflags & EFLG_VM )
+ if ( ctxt->regs->eflags & EF_VM )
return 3;
if ( (ops->read_segment == NULL) ||
@@ -1321,9 +1303,9 @@ x86_emulate(
/* arpl */
uint16_t src_val = dst.val;
dst = src;
- _regs.eflags &= ~EFLG_ZF;
- _regs.eflags |= ((src_val & 3) > (dst.val & 3)) ? EFLG_ZF : 0;
- if ( _regs.eflags & EFLG_ZF )
+ _regs.eflags &= ~EF_ZF;
+ _regs.eflags |= ((src_val & 3) > (dst.val & 3)) ? EF_ZF : 0;
+ if ( _regs.eflags & EF_ZF )
dst.val = (dst.val & ~3) | (src_val & 3);
else
dst.type = OP_NONE;
@@ -1334,27 +1316,27 @@ x86_emulate(
case 0x69: /* imul imm16/32 */
case 0x6b: /* imul imm8 */ {
unsigned long reg = *(long *)decode_register(modrm_reg, &_regs, 0);
- _regs.eflags &= ~(EFLG_OF|EFLG_CF);
+ _regs.eflags &= ~(EF_OF|EF_CF);
switch ( dst.bytes )
{
case 2:
dst.val = ((uint32_t)(int16_t)src.val *
(uint32_t)(int16_t)reg);
if ( (int16_t)dst.val != (uint32_t)dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
break;
#ifdef __x86_64__
case 4:
dst.val = ((uint64_t)(int32_t)src.val *
(uint64_t)(int32_t)reg);
if ( (int32_t)dst.val != dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
break;
#endif
default: {
unsigned long m[2] = { src.val, reg };
if ( imul_dbl(m) )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
dst.val = m[0];
break;
}
@@ -1538,32 +1520,32 @@ x86_emulate(
dst.type = OP_REG;
dst.reg = (unsigned long *)&_regs.eax;
dst.val = *dst.reg;
- _regs.eflags &= ~(EFLG_OF|EFLG_CF);
+ _regs.eflags &= ~(EF_OF|EF_CF);
switch ( src.bytes )
{
case 1:
dst.val *= src.val;
if ( (uint8_t)dst.val != (uint16_t)dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
break;
case 2:
dst.val *= src.val;
if ( (uint16_t)dst.val != (uint32_t)dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
*(uint16_t *)&_regs.edx = dst.val >> 16;
break;
#ifdef __x86_64__
case 4:
dst.val *= src.val;
if ( (uint32_t)dst.val != dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
_regs.edx = (uint32_t)(dst.val >> 32);
break;
#endif
default: {
unsigned long m[2] = { src.val, dst.val };
if ( mul_dbl(m) )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
_regs.edx = m[1];
dst.val = m[0];
break;
@@ -1575,20 +1557,20 @@ x86_emulate(
dst.type = OP_REG;
dst.reg = (unsigned long *)&_regs.eax;
dst.val = *dst.reg;
- _regs.eflags &= ~(EFLG_OF|EFLG_CF);
+ _regs.eflags &= ~(EF_OF|EF_CF);
switch ( src.bytes )
{
case 1:
dst.val = ((uint16_t)(int8_t)src.val *
(uint16_t)(int8_t)dst.val);
if ( (int8_t)dst.val != (uint16_t)dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
break;
case 2:
dst.val = ((uint32_t)(int16_t)src.val *
(uint32_t)(int16_t)dst.val);
if ( (int16_t)dst.val != (uint32_t)dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
*(uint16_t *)&_regs.edx = dst.val >> 16;
break;
#ifdef __x86_64__
@@ -1596,14 +1578,14 @@ x86_emulate(
dst.val = ((uint64_t)(int32_t)src.val *
(uint64_t)(int32_t)dst.val);
if ( (int32_t)dst.val != dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
_regs.edx = (uint32_t)(dst.val >> 32);
break;
#endif
default: {
unsigned long m[2] = { src.val, dst.val };
if ( imul_dbl(m) )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
_regs.edx = m[1];
dst.val = m[0];
break;
@@ -1824,10 +1806,10 @@ x86_emulate(
}
/* Commit shadow register state. */
- _regs.eflags &= ~EFLG_RF;
+ _regs.eflags &= ~EF_RF;
*ctxt->regs = _regs;
- if ( (_regs.eflags & EFLG_TF) &&
+ if ( (_regs.eflags & EF_TF) &&
(rc == X86EMUL_OKAY) &&
(ops->inject_hw_exception != NULL) )
rc = ops->inject_hw_exception(EXC_DB, ctxt) ? : X86EMUL_EXCEPTION;
@@ -1906,21 +1888,21 @@ x86_emulate(
uint8_t al = _regs.eax;
unsigned long eflags = _regs.eflags;
generate_exception_if(mode_64bit(), EXC_UD);
- _regs.eflags &= ~(EFLG_CF|EFLG_AF);
- if ( ((al & 0x0f) > 9) || (eflags & EFLG_AF) )
+ _regs.eflags &= ~(EF_CF|EF_AF);
+ if ( ((al & 0x0f) > 9) || (eflags & EF_AF) )
{
*(uint8_t *)&_regs.eax += 6;
- _regs.eflags |= EFLG_AF;
+ _regs.eflags |= EF_AF;
}
- if ( (al > 0x99) || (eflags & EFLG_CF) )
+ if ( (al > 0x99) || (eflags & EF_CF) )
{
*(uint8_t *)&_regs.eax += 0x60;
- _regs.eflags |= EFLG_CF;
+ _regs.eflags |= EF_CF;
}
- _regs.eflags &= ~(EFLG_SF|EFLG_ZF|EFLG_PF);
- _regs.eflags |= ((uint8_t)_regs.eax == 0) ? EFLG_ZF : 0;
- _regs.eflags |= (( int8_t)_regs.eax < 0) ? EFLG_SF : 0;
- _regs.eflags |= even_parity(_regs.eax) ? EFLG_PF : 0;
+ _regs.eflags &= ~(EF_SF|EF_ZF|EF_PF);
+ _regs.eflags |= ((uint8_t)_regs.eax == 0) ? EF_ZF : 0;
+ _regs.eflags |= (( int8_t)_regs.eax < 0) ? EF_SF : 0;
+ _regs.eflags |= even_parity(_regs.eax) ? EF_PF : 0;
break;
}
@@ -1928,35 +1910,35 @@ x86_emulate(
uint8_t al = _regs.eax;
unsigned long eflags = _regs.eflags;
generate_exception_if(mode_64bit(), EXC_UD);
- _regs.eflags &= ~(EFLG_CF|EFLG_AF);
- if ( ((al & 0x0f) > 9) || (eflags & EFLG_AF) )
+ _regs.eflags &= ~(EF_CF|EF_AF);
+ if ( ((al & 0x0f) > 9) || (eflags & EF_AF) )
{
- _regs.eflags |= EFLG_AF;
- if ( (al < 6) || (eflags & EFLG_CF) )
- _regs.eflags |= EFLG_CF;
+ _regs.eflags |= EF_AF;
+ if ( (al < 6) || (eflags & EF_CF) )
+ _regs.eflags |= EF_CF;
*(uint8_t *)&_regs.eax -= 6;
}
- if ( (al > 0x99) || (eflags & EFLG_CF) )
+ if ( (al > 0x99) || (eflags & EF_CF) )
{
*(uint8_t *)&_regs.eax -= 0x60;
- _regs.eflags |= EFLG_CF;
+ _regs.eflags |= EF_CF;
}
- _regs.eflags &= ~(EFLG_SF|EFLG_ZF|EFLG_PF);
- _regs.eflags |= ((uint8_t)_regs.eax == 0) ? EFLG_ZF : 0;
- _regs.eflags |= (( int8_t)_regs.eax < 0) ? EFLG_SF : 0;
- _regs.eflags |= even_parity(_regs.eax) ? EFLG_PF : 0;
+ _regs.eflags &= ~(EF_SF|EF_ZF|EF_PF);
+ _regs.eflags |= ((uint8_t)_regs.eax == 0) ? EF_ZF : 0;
+ _regs.eflags |= (( int8_t)_regs.eax < 0) ? EF_SF : 0;
+ _regs.eflags |= even_parity(_regs.eax) ? EF_PF : 0;
break;
}
case 0x37: /* aaa */
case 0x3f: /* aas */
generate_exception_if(mode_64bit(), EXC_UD);
- _regs.eflags &= ~EFLG_CF;
- if ( ((uint8_t)_regs.eax > 9) || (_regs.eflags & EFLG_AF) )
+ _regs.eflags &= ~EF_CF;
+ if ( ((uint8_t)_regs.eax > 9) || (_regs.eflags & EF_AF) )
{
((uint8_t *)&_regs.eax)[0] += (b == 0x37) ? 6 : -6;
((uint8_t *)&_regs.eax)[1] += (b == 0x37) ? 1 : -1;
- _regs.eflags |= EFLG_CF | EFLG_AF;
+ _regs.eflags |= EF_CF | EF_AF;
}
((uint8_t *)&_regs.eax)[0] &= 0x0f;
break;
@@ -2057,7 +2039,7 @@ x86_emulate(
&dst.val, ctxt)) != 0 )
goto done;
register_address_increment(
- _regs.edi, (_regs.eflags & EFLG_DF) ? -dst.bytes : dst.bytes);
+ _regs.edi, (_regs.eflags & EF_DF) ? -dst.bytes : dst.bytes);
break;
case 0x6e ... 0x6f: /* outs %esi,%dx */
@@ -2072,7 +2054,7 @@ x86_emulate(
dst.val, ctxt)) != 0 )
goto done;
register_address_increment(
- _regs.esi, (_regs.eflags & EFLG_DF) ? -dst.bytes : dst.bytes);
+ _regs.esi, (_regs.eflags & EF_DF) ? -dst.bytes : dst.bytes);
break;
case 0x70 ... 0x7f: /* jcc (short) */ {
@@ -2149,9 +2131,9 @@ x86_emulate(
goto push;
case 0x9d: /* popf */ {
- uint32_t mask = EFLG_VIP | EFLG_VIF | EFLG_VM;
+ uint32_t mask = EF_VIP | EF_VIF | EF_VM;
if ( !mode_iopl() )
- mask |= EFLG_IOPL;
+ mask |= EF_IOPL;
fail_if(ops->write_rflags == NULL);
/* 64-bit mode: POP defaults to a 64-bit operand. */
if ( mode_64bit() && (op_bytes == 4) )
@@ -2206,9 +2188,9 @@ x86_emulate(
&dst.val, dst.bytes, ctxt)) != 0 )
goto done;
register_address_increment(
- _regs.esi, (_regs.eflags & EFLG_DF) ? -dst.bytes : dst.bytes);
+ _regs.esi, (_regs.eflags & EF_DF) ? -dst.bytes : dst.bytes);
register_address_increment(
- _regs.edi, (_regs.eflags & EFLG_DF) ? -dst.bytes : dst.bytes);
+ _regs.edi, (_regs.eflags & EF_DF) ? -dst.bytes : dst.bytes);
break;
case 0xa6 ... 0xa7: /* cmps */ {
@@ -2221,13 +2203,13 @@ x86_emulate(
&src.val, src.bytes, ctxt)) )
goto done;
register_address_increment(
- _regs.esi, (_regs.eflags & EFLG_DF) ? -dst.bytes : dst.bytes);
+ _regs.esi, (_regs.eflags & EF_DF) ? -dst.bytes : dst.bytes);
register_address_increment(
- _regs.edi, (_regs.eflags & EFLG_DF) ? -src.bytes : src.bytes);
+ _regs.edi, (_regs.eflags & EF_DF) ? -src.bytes : src.bytes);
/* cmp: dst - src ==> src=*%%edi,dst=*%%esi ==> *%%esi - *%%edi */
emulate_2op_SrcV("cmp", src, dst, _regs.eflags);
- if ( ((rep_prefix == REPE_PREFIX) && !(_regs.eflags & EFLG_ZF)) ||
- ((rep_prefix == REPNE_PREFIX) && (_regs.eflags & EFLG_ZF)) )
+ if ( ((rep_prefix == REPE_PREFIX) && !(_regs.eflags & EF_ZF)) ||
+ ((rep_prefix == REPNE_PREFIX) && (_regs.eflags & EF_ZF)) )
_regs.eip = next_eip;
break;
}
@@ -2240,7 +2222,7 @@ x86_emulate(
dst.mem.off = truncate_ea(_regs.edi);
dst.val = _regs.eax;
register_address_increment(
- _regs.edi, (_regs.eflags & EFLG_DF) ? -dst.bytes : dst.bytes);
+ _regs.edi, (_regs.eflags & EF_DF) ? -dst.bytes : dst.bytes);
break;
case 0xac ... 0xad: /* lods */
@@ -2252,7 +2234,7 @@ x86_emulate(
&dst.val, dst.bytes, ctxt)) != 0 )
goto done;
register_address_increment(
- _regs.esi, (_regs.eflags & EFLG_DF) ? -dst.bytes : dst.bytes);
+ _regs.esi, (_regs.eflags & EF_DF) ? -dst.bytes : dst.bytes);
break;
case 0xae ... 0xaf: /* scas */ {
@@ -2264,11 +2246,11 @@ x86_emulate(
&src.val, src.bytes, ctxt)) != 0 )
goto done;
register_address_increment(
- _regs.edi, (_regs.eflags & EFLG_DF) ? -src.bytes : src.bytes);
+ _regs.edi, (_regs.eflags & EF_DF) ? -src.bytes : src.bytes);
/* cmp: dst - src ==> src=*%%edi,dst=%%eax ==> %%eax - *%%edi */
emulate_2op_SrcV("cmp", src, dst, _regs.eflags);
- if ( ((rep_prefix == REPE_PREFIX) && !(_regs.eflags & EFLG_ZF)) ||
- ((rep_prefix == REPNE_PREFIX) && (_regs.eflags & EFLG_ZF)) )
+ if ( ((rep_prefix == REPE_PREFIX) && !(_regs.eflags & EF_ZF)) ||
+ ((rep_prefix == REPNE_PREFIX) && (_regs.eflags & EF_ZF)) )
_regs.eip = next_eip;
break;
}
@@ -2369,16 +2351,16 @@ x86_emulate(
case 0xce: /* into */
generate_exception_if(mode_64bit(), EXC_UD);
- if ( !(_regs.eflags & EFLG_OF) )
+ if ( !(_regs.eflags & EF_OF) )
break;
src.val = EXC_OF;
goto swint;
case 0xcf: /* iret */ {
unsigned long cs, eip, eflags;
- uint32_t mask = EFLG_VIP | EFLG_VIF | EFLG_VM;
+ uint32_t mask = EF_VIP | EF_VIF | EF_VM;
if ( !mode_iopl() )
- mask |= EFLG_IOPL;
+ mask |= EF_IOPL;
fail_if(!in_realmode(ctxt, ops));
fail_if(ops->write_rflags == NULL);
if ( (rc = ops->read(x86_seg_ss, sp_post_inc(op_bytes),
@@ -2407,10 +2389,10 @@ x86_emulate(
generate_exception_if(mode_64bit(), EXC_UD);
generate_exception_if(base == 0, EXC_DE);
*(uint16_t *)&_regs.eax = ((al / base) << 8) | (al % base);
- _regs.eflags &= ~(EFLG_SF|EFLG_ZF|EFLG_PF);
- _regs.eflags |= ((uint8_t)_regs.eax == 0) ? EFLG_ZF : 0;
- _regs.eflags |= (( int8_t)_regs.eax < 0) ? EFLG_SF : 0;
- _regs.eflags |= even_parity(_regs.eax) ? EFLG_PF : 0;
+ _regs.eflags &= ~(EF_SF|EF_ZF|EF_PF);
+ _regs.eflags |= ((uint8_t)_regs.eax == 0) ? EF_ZF : 0;
+ _regs.eflags |= (( int8_t)_regs.eax < 0) ? EF_SF : 0;
+ _regs.eflags |= even_parity(_regs.eax) ? EF_PF : 0;
break;
}
@@ -2419,16 +2401,16 @@ x86_emulate(
uint16_t ax = _regs.eax;
generate_exception_if(mode_64bit(), EXC_UD);
*(uint16_t *)&_regs.eax = (uint8_t)(ax + ((ax >> 8) * base));
- _regs.eflags &= ~(EFLG_SF|EFLG_ZF|EFLG_PF);
- _regs.eflags |= ((uint8_t)_regs.eax == 0) ? EFLG_ZF : 0;
- _regs.eflags |= (( int8_t)_regs.eax < 0) ? EFLG_SF : 0;
- _regs.eflags |= even_parity(_regs.eax) ? EFLG_PF : 0;
+ _regs.eflags &= ~(EF_SF|EF_ZF|EF_PF);
+ _regs.eflags |= ((uint8_t)_regs.eax == 0) ? EF_ZF : 0;
+ _regs.eflags |= (( int8_t)_regs.eax < 0) ? EF_SF : 0;
+ _regs.eflags |= even_parity(_regs.eax) ? EF_PF : 0;
break;
}
case 0xd6: /* salc */
generate_exception_if(mode_64bit(), EXC_UD);
- *(uint8_t *)&_regs.eax = (_regs.eflags & EFLG_CF) ? 0xff : 0x00;
+ *(uint8_t *)&_regs.eax = (_regs.eflags & EF_CF) ? 0xff : 0x00;
break;
case 0xd7: /* xlat */ {
@@ -2442,7 +2424,7 @@ x86_emulate(
case 0xe0 ... 0xe2: /* loop{,z,nz} */ {
int rel = insn_fetch_type(int8_t);
- int do_jmp = !(_regs.eflags & EFLG_ZF); /* loopnz */
+ int do_jmp = !(_regs.eflags & EF_ZF); /* loopnz */
if ( b == 0xe1 )
do_jmp = !do_jmp; /* loopz */
else if ( b == 0xe2 )
@@ -2552,34 +2534,34 @@ x86_emulate(
break;
case 0xf5: /* cmc */
- _regs.eflags ^= EFLG_CF;
+ _regs.eflags ^= EF_CF;
break;
case 0xf8: /* clc */
- _regs.eflags &= ~EFLG_CF;
+ _regs.eflags &= ~EF_CF;
break;
case 0xf9: /* stc */
- _regs.eflags |= EFLG_CF;
+ _regs.eflags |= EF_CF;
break;
case 0xfa: /* cli */
case 0xfb: /* sti */
generate_exception_if(!mode_iopl(), EXC_GP);
fail_if(ops->write_rflags == NULL);
- _regs.eflags &= ~EFLG_IF;
+ _regs.eflags &= ~EF_IE;
if ( b == 0xfb ) /* sti */
- _regs.eflags |= EFLG_IF;
+ _regs.eflags |= EF_IE;
if ( (rc = ops->write_rflags(_regs.eflags, ctxt)) != 0 )
goto done;
break;
case 0xfc: /* cld */
- _regs.eflags &= ~EFLG_DF;
+ _regs.eflags &= ~EF_DF;
break;
case 0xfd: /* std */
- _regs.eflags |= EFLG_DF;
+ _regs.eflags |= EF_DF;
break;
}
goto writeback;
@@ -2604,7 +2586,7 @@ x86_emulate(
emulate_2op_SrcV("cmp", src, dst, _regs.eflags);
/* Always write back. The question is: where to? */
d |= Mov;
- if ( _regs.eflags & EFLG_ZF )
+ if ( _regs.eflags & EF_ZF )
{
/* Success: write back to memory. */
dst.val = src.orig_val;
@@ -2639,14 +2621,14 @@ x86_emulate(
((dst.orig_val << shift) |
((src.val >> (width - shift)) & ((1ull << shift) - 1))));
dst.val = truncate_word(dst.val, dst.bytes);
- _regs.eflags &= ~(EFLG_OF|EFLG_SF|EFLG_ZF|EFLG_PF|EFLG_CF);
+ _regs.eflags &= ~(EF_OF|EF_SF|EF_ZF|EF_PF|EF_CF);
if ( (dst.val >> ((b & 8) ? (shift - 1) : (width - shift))) & 1 )
- _regs.eflags |= EFLG_CF;
+ _regs.eflags |= EF_CF;
if ( ((dst.val ^ dst.orig_val) >> (width - 1)) & 1 )
- _regs.eflags |= EFLG_OF;
- _regs.eflags |= ((dst.val >> (width - 1)) & 1) ? EFLG_SF : 0;
- _regs.eflags |= (dst.val == 0) ? EFLG_ZF : 0;
- _regs.eflags |= even_parity(dst.val) ? EFLG_PF : 0;
+ _regs.eflags |= EF_OF;
+ _regs.eflags |= ((dst.val >> (width - 1)) & 1) ? EF_SF : 0;
+ _regs.eflags |= (dst.val == 0) ? EF_ZF : 0;
+ _regs.eflags |= even_parity(dst.val) ? EF_PF : 0;
break;
}
@@ -2659,27 +2641,27 @@ x86_emulate(
break;
case 0xaf: /* imul */
- _regs.eflags &= ~(EFLG_OF|EFLG_CF);
+ _regs.eflags &= ~(EF_OF|EF_CF);
switch ( dst.bytes )
{
case 2:
dst.val = ((uint32_t)(int16_t)src.val *
(uint32_t)(int16_t)dst.val);
if ( (int16_t)dst.val != (uint32_t)dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
break;
#ifdef __x86_64__
case 4:
dst.val = ((uint64_t)(int32_t)src.val *
(uint64_t)(int32_t)dst.val);
if ( (int32_t)dst.val != dst.val )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
break;
#endif
default: {
unsigned long m[2] = { src.val, dst.val };
if ( imul_dbl(m) )
- _regs.eflags |= EFLG_OF|EFLG_CF;
+ _regs.eflags |= EF_OF|EF_CF;
dst.val = m[0];
break;
}
@@ -2710,8 +2692,8 @@ x86_emulate(
asm ( "bsf %2,%0; setz %b1"
: "=r" (dst.val), "=q" (zf)
: "r" (src.val), "1" (0) );
- _regs.eflags &= ~EFLG_ZF;
- _regs.eflags |= zf ? EFLG_ZF : 0;
+ _regs.eflags &= ~EF_ZF;
+ _regs.eflags |= zf ? EF_ZF : 0;
break;
}
@@ -2720,8 +2702,8 @@ x86_emulate(
asm ( "bsr %2,%0; setz %b1"
: "=r" (dst.val), "=q" (zf)
: "r" (src.val), "1" (0) );
- _regs.eflags &= ~EFLG_ZF;
- _regs.eflags |= zf ? EFLG_ZF : 0;
+ _regs.eflags &= ~EF_ZF;
+ _regs.eflags |= zf ? EF_ZF : 0;
break;
}
@@ -2984,7 +2966,7 @@ x86_emulate(
{
_regs.eax = old_lo;
_regs.edx = old_hi;
- _regs.eflags &= ~EFLG_ZF;
+ _regs.eflags &= ~EF_ZF;
}
else if ( ops->cmpxchg8b == NULL )
{
@@ -2996,7 +2978,7 @@ x86_emulate(
if ( (rc = ops->cmpxchg8b(ea.mem.seg, ea.mem.off, old_lo, old_hi,
_regs.ebx, _regs.ecx, ctxt)) != 0 )
goto done;
- _regs.eflags |= EFLG_ZF;
+ _regs.eflags |= EF_ZF;
}
break;
}
@@ -3011,7 +2993,7 @@ x86_emulate(
{
_regs.eax = (uint32_t)(old>>0);
_regs.edx = (uint32_t)(old>>32);
- _regs.eflags &= ~EFLG_ZF;
+ _regs.eflags &= ~EF_ZF;
}
else
{
@@ -3019,7 +3001,7 @@ x86_emulate(
if ( (rc = ops->cmpxchg(ea.mem.seg, ea.mem.off, old,
new, 8, ctxt)) != 0 )
goto done;
- _regs.eflags |= EFLG_ZF;
+ _regs.eflags |= EF_ZF;
}
break;
}
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