Updated block-dmmd script - fate#310510 - fix xenpaging restore changes to integrate paging into xm/xend xenpaging.autostart.patch xenpaging.doc.patch - bnc#787163 - VUL-0: CVE-2012-4544: xen: Domain builder Out-of- memory due to malicious kernel/ramdisk (XSA 25) CVE-2012-4544-xsa25.patch - bnc#779212 - VUL-0: CVE-2012-4411: XEN / qemu: guest administrator can access qemu monitor console (XSA-19) CVE-2012-4411-xsa19.patch - bnc#786516 - VUL-0: CVE-2012-4535: xen: Timer overflow DoS vulnerability CVE-2012-4535-xsa20.patch - bnc#786518 - VUL-0: CVE-2012-4536: xen: pirq range check DoS vulnerability CVE-2012-4536-xsa21.patch - bnc#786517 - VUL-0: CVE-2012-4537: xen: Memory mapping failure DoS vulnerability CVE-2012-4537-xsa22.patch - bnc#786519 - VUL-0: CVE-2012-4538: xen: Unhooking empty PAE entries DoS vulnerability CVE-2012-4538-xsa23.patch - bnc#786520 - VUL-0: CVE-2012-4539: xen: Grant table hypercall infinite loop DoS vulnerability CVE-2012-4539-xsa24.patch OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=212
100 lines
3.9 KiB
Diff
100 lines
3.9 KiB
Diff
References: bnc#784087
|
|
|
|
# HG changeset patch
|
|
# User Jan Beulich <jbeulich@suse.com>
|
|
# Date 1351093908 -7200
|
|
# Node ID 22e08c9ac770db07c3c3e7c844aa7153050939f3
|
|
# Parent 07cf00a917cd1d1849f3e40d5b8ecc2cd8964fe8
|
|
x86: don't special case first IO-APIC
|
|
|
|
It has always been puzzling me why the first IO-APIC gets special cased
|
|
in two places, and finally Xen got run on a system where this breaks:
|
|
|
|
(XEN) ACPI: IOAPIC (id[0x10] address[0xfecff000] gsi_base[0])
|
|
(XEN) IOAPIC[0]: apic_id 16, version 17, address 0xfecff000, GSI 0-2
|
|
(XEN) ACPI: IOAPIC (id[0x0f] address[0xfec00000] gsi_base[3])
|
|
(XEN) IOAPIC[1]: apic_id 15, version 17, address 0xfec00000, GSI 3-38
|
|
(XEN) ACPI: IOAPIC (id[0x0e] address[0xfec01000] gsi_base[39])
|
|
(XEN) IOAPIC[2]: apic_id 14, version 17, address 0xfec01000, GSI 39-74
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 1 global_irq 4 dfl dfl)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 0 global_irq 5 dfl dfl)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 3 global_irq 6 dfl dfl)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 4 global_irq 7 dfl dfl)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 6 global_irq 9 dfl dfl)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 7 global_irq 10 dfl dfl)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 8 global_irq 11 low edge)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 9 global_irq 12 dfl dfl)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 12 global_irq 15 dfl dfl)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 13 global_irq 16 dfl dfl)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 14 global_irq 17 low edge)
|
|
(XEN) ACPI: INT_SRC_OVR (bus 0 bus_irq 15 global_irq 18 dfl dfl)
|
|
|
|
i.e. all legacy IRQs (apart from the timer one, but the firmware passed
|
|
data doesn't look right for that case anyway, as both Xen and native
|
|
Linux are falling back to use the virtual wire setup for IRQ0,
|
|
apparently rather using pin 2 of the first IO-APIC) are being handled
|
|
by the second IO-APIC.
|
|
|
|
This at once eliminates the possibility of an unmasked RTE getting
|
|
written without having got a vector put in place (in
|
|
setup_IO_APIC_irqs()).
|
|
|
|
Signed-off-by: Jan Beulich <jbeulich@suse.com>
|
|
Acked-by: Keir Fraser <keir@xen.org>
|
|
|
|
Index: xen-4.2.0-testing/xen/arch/x86/io_apic.c
|
|
===================================================================
|
|
--- xen-4.2.0-testing.orig/xen/arch/x86/io_apic.c
|
|
+++ xen-4.2.0-testing/xen/arch/x86/io_apic.c
|
|
@@ -999,18 +999,17 @@ static void __init setup_IO_APIC_irqs(vo
|
|
else
|
|
add_pin_to_irq(irq, apic, pin);
|
|
|
|
- if (!apic && !IO_APIC_IRQ(irq))
|
|
+ if (!IO_APIC_IRQ(irq))
|
|
continue;
|
|
|
|
- if (IO_APIC_IRQ(irq)) {
|
|
- vector = assign_irq_vector(irq, NULL);
|
|
- BUG_ON(vector < 0);
|
|
- entry.vector = vector;
|
|
- ioapic_register_intr(irq, IOAPIC_AUTO);
|
|
+ vector = assign_irq_vector(irq, NULL);
|
|
+ BUG_ON(vector < 0);
|
|
+ entry.vector = vector;
|
|
+ ioapic_register_intr(irq, IOAPIC_AUTO);
|
|
+
|
|
+ if (platform_legacy_irq(irq))
|
|
+ disable_8259A_irq(irq_to_desc(irq));
|
|
|
|
- if (!apic && platform_legacy_irq(irq))
|
|
- disable_8259A_irq(irq_to_desc(irq));
|
|
- }
|
|
desc = irq_to_desc(irq);
|
|
SET_DEST(entry.dest.dest32, entry.dest.logical.logical_dest,
|
|
cpu_mask_to_apicid(desc->arch.cpu_mask));
|
|
@@ -2257,18 +2256,15 @@ unsigned apic_gsi_base(int apic);
|
|
|
|
static int apic_pin_2_gsi_irq(int apic, int pin)
|
|
{
|
|
- int idx, irq;
|
|
+ int idx;
|
|
|
|
if (apic < 0)
|
|
return -EINVAL;
|
|
|
|
- irq = apic_gsi_base(apic) + pin;
|
|
- if (apic == 0) {
|
|
- idx = find_irq_entry(apic, pin, mp_INT);
|
|
- if (idx >= 0)
|
|
- irq = pin_2_irq(idx, apic, pin);
|
|
- }
|
|
- return irq;
|
|
+ idx = find_irq_entry(apic, pin, mp_INT);
|
|
+
|
|
+ return idx >= 0 ? pin_2_irq(idx, apic, pin)
|
|
+ : apic_gsi_base(apic) + pin;
|
|
}
|
|
|
|
int ioapic_guest_read(unsigned long physbase, unsigned int reg, u32 *pval)
|