38 lines
1.6 KiB
Diff
38 lines
1.6 KiB
Diff
# HG changeset patch
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# User Keir Fraser <keir.fraser@citrix.com>
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# Date 1231859806 0
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# Node ID 73770182aee48e79a2caa441ad1013982deefddb
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# Parent 1c6642adaeb204495c95ab86c8aee41587a22928
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AMD IOMMU: Reset tail and head pointer of cmd buffer and event log
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Reset the tail and the head pointers of command buffer and event log
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to zero in case that iommu does not reset them after the base
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addresses of those buffers are updated.
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Signed-off-by: Wei Wang <wei.wang2@amd.com>
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--- a/xen/drivers/passthrough/amd/iommu_init.c
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+++ b/xen/drivers/passthrough/amd/iommu_init.c
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@@ -195,6 +195,10 @@ static void __init set_iommu_command_buf
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IOMMU_CONTROL_COMMAND_BUFFER_ENABLE_MASK,
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IOMMU_CONTROL_COMMAND_BUFFER_ENABLE_SHIFT, &entry);
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writel(entry, iommu->mmio_base+IOMMU_CONTROL_MMIO_OFFSET);
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+
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+ /*reset head and tail pointer */
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+ writel(0x0, iommu->mmio_base + IOMMU_CMD_BUFFER_HEAD_OFFSET);
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+ writel(0x0, iommu->mmio_base + IOMMU_CMD_BUFFER_TAIL_OFFSET);
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}
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static void __init register_iommu_exclusion_range(struct amd_iommu *iommu)
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@@ -259,6 +263,10 @@ static void __init set_iommu_event_log_c
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IOMMU_CONTROL_COMP_WAIT_INT_MASK,
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IOMMU_CONTROL_COMP_WAIT_INT_SHIFT, &entry);
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writel(entry, iommu->mmio_base+IOMMU_CONTROL_MMIO_OFFSET);
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+
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+ /*reset head and tail pointer */
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+ writel(0x0, iommu->mmio_base + IOMMU_EVENT_LOG_HEAD_OFFSET);
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+ writel(0x0, iommu->mmio_base + IOMMU_EVENT_LOG_TAIL_OFFSET);
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}
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static int amd_iommu_read_event_log(struct amd_iommu *iommu, u32 event[])
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