From 5d3575eaf04be5883ea6d43bc6bb524a8ad007506eca5f15f5327b68fa4530bb Mon Sep 17 00:00:00 2001 From: Richard Biener Date: Mon, 16 Jul 2018 11:21:50 +0000 Subject: [PATCH] - Adjust cross-avr-omit_section_dynsym.patch. OBS-URL: https://build.opensuse.org/package/show/devel:gcc/binutils?expand=0&rev=280 --- binutils.changes | 1 + cross-aarch64-binutils.changes | 1 + cross-arm-binutils.changes | 1 + cross-avr-binutils.changes | 1 + cross-avr-omit_section_dynsym.patch | 2 +- cross-epiphany-binutils.changes | 1 + cross-hppa-binutils.changes | 1 + cross-hppa64-binutils.changes | 1 + cross-i386-binutils.changes | 1 + cross-ia64-binutils.changes | 1 + cross-m68k-binutils.changes | 1 + cross-mips-binutils.changes | 1 + cross-ppc-binutils.changes | 1 + cross-ppc64-binutils.changes | 1 + cross-ppc64le-binutils.changes | 1 + cross-riscv64-binutils.changes | 1 + cross-rx-binutils.changes | 1 + cross-s390-binutils.changes | 1 + cross-s390x-binutils.changes | 1 + cross-sparc-binutils.changes | 1 + cross-sparc64-binutils.changes | 1 + cross-spu-binutils.changes | 1 + cross-x86_64-binutils.changes | 1 + 23 files changed, 23 insertions(+), 1 deletion(-) diff --git a/binutils.changes b/binutils.changes index 22f965a..d18410e 100644 --- a/binutils.changes +++ b/binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-aarch64-binutils.changes b/cross-aarch64-binutils.changes index 22f965a..d18410e 100644 --- a/cross-aarch64-binutils.changes +++ b/cross-aarch64-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-arm-binutils.changes b/cross-arm-binutils.changes index 22f965a..d18410e 100644 --- a/cross-arm-binutils.changes +++ b/cross-arm-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-avr-binutils.changes b/cross-avr-binutils.changes index 22f965a..d18410e 100644 --- a/cross-avr-binutils.changes +++ b/cross-avr-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-avr-omit_section_dynsym.patch b/cross-avr-omit_section_dynsym.patch index 2642251..e836b0f 100644 --- a/cross-avr-omit_section_dynsym.patch +++ b/cross-avr-omit_section_dynsym.patch @@ -12,7 +12,7 @@ diff -c -3 -p -r1.27 elf32-avr.c bfd_elf_avr_final_write_processing #define elf_backend_object_p elf32_avr_object_p + #define elf_backend_omit_section_dynsym \ -+ ((bfd_boolean (*) (bfd *, struct bfd_link_info *, asection *)) bfd_true) ++ _bfd_elf_omit_section_dynsym_all #define bfd_elf32_bfd_relax_section elf32_avr_relax_section #define bfd_elf32_bfd_get_relocated_section_contents \ diff --git a/cross-epiphany-binutils.changes b/cross-epiphany-binutils.changes index 22f965a..d18410e 100644 --- a/cross-epiphany-binutils.changes +++ b/cross-epiphany-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-hppa-binutils.changes b/cross-hppa-binutils.changes index 22f965a..d18410e 100644 --- a/cross-hppa-binutils.changes +++ b/cross-hppa-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-hppa64-binutils.changes b/cross-hppa64-binutils.changes index 22f965a..d18410e 100644 --- a/cross-hppa64-binutils.changes +++ b/cross-hppa64-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-i386-binutils.changes b/cross-i386-binutils.changes index 22f965a..d18410e 100644 --- a/cross-i386-binutils.changes +++ b/cross-i386-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-ia64-binutils.changes b/cross-ia64-binutils.changes index 22f965a..d18410e 100644 --- a/cross-ia64-binutils.changes +++ b/cross-ia64-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-m68k-binutils.changes b/cross-m68k-binutils.changes index 22f965a..d18410e 100644 --- a/cross-m68k-binutils.changes +++ b/cross-m68k-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-mips-binutils.changes b/cross-mips-binutils.changes index 22f965a..d18410e 100644 --- a/cross-mips-binutils.changes +++ b/cross-mips-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-ppc-binutils.changes b/cross-ppc-binutils.changes index 22f965a..d18410e 100644 --- a/cross-ppc-binutils.changes +++ b/cross-ppc-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-ppc64-binutils.changes b/cross-ppc64-binutils.changes index 22f965a..d18410e 100644 --- a/cross-ppc64-binutils.changes +++ b/cross-ppc64-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-ppc64le-binutils.changes b/cross-ppc64le-binutils.changes index 22f965a..d18410e 100644 --- a/cross-ppc64le-binutils.changes +++ b/cross-ppc64le-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-riscv64-binutils.changes b/cross-riscv64-binutils.changes index 22f965a..d18410e 100644 --- a/cross-riscv64-binutils.changes +++ b/cross-riscv64-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-rx-binutils.changes b/cross-rx-binutils.changes index 22f965a..d18410e 100644 --- a/cross-rx-binutils.changes +++ b/cross-rx-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-s390-binutils.changes b/cross-s390-binutils.changes index 22f965a..d18410e 100644 --- a/cross-s390-binutils.changes +++ b/cross-s390-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-s390x-binutils.changes b/cross-s390x-binutils.changes index 22f965a..d18410e 100644 --- a/cross-s390x-binutils.changes +++ b/cross-s390x-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-sparc-binutils.changes b/cross-sparc-binutils.changes index 22f965a..d18410e 100644 --- a/cross-sparc-binutils.changes +++ b/cross-sparc-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-sparc64-binutils.changes b/cross-sparc64-binutils.changes index 22f965a..d18410e 100644 --- a/cross-sparc64-binutils.changes +++ b/cross-sparc64-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-spu-binutils.changes b/cross-spu-binutils.changes index 22f965a..d18410e 100644 --- a/cross-spu-binutils.changes +++ b/cross-spu-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de diff --git a/cross-x86_64-binutils.changes b/cross-x86_64-binutils.changes index 22f965a..d18410e 100644 --- a/cross-x86_64-binutils.changes +++ b/cross-x86_64-binutils.changes @@ -30,6 +30,7 @@ Mon Jul 16 07:55:51 UTC 2018 - rguenther@suse.com * Includes riscv-relax-size.patch, riscv-relax-relocatable.patch, riscv-relax-versioned-hidden.patch and riscv-wrap-relax.patch - Refresh enable-targets-gold.diff. +- Adjust cross-avr-omit_section_dynsym.patch. ------------------------------------------------------------------- Mon Jun 4 09:49:37 UTC 2018 - schwab@suse.de