From f9063f0adf29c8c5c56489f7d6d5cc5d709341e1ad07ce809882ab6428c68220 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Martin=20Li=C5=A1ka?= Date: Fri, 14 Oct 2022 09:00:43 +0000 Subject: [PATCH] Accepting request 1010630 from home:marxin:branches:Base:System - Add RISC-V specific patches: * 0001-libelf-Sync-elf.h-from-glibc.patch * 0002-backends-Handle-new-RISC-V-specific-definitions.patch * 0003-elflint-Allow-zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch * 0004-readelf-Handle-SHT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch * 0005-backends-Add-RISC-V-object-attribute-printing.patch OBS-URL: https://build.opensuse.org/request/show/1010630 OBS-URL: https://build.opensuse.org/package/show/Base:System/elfutils?expand=0&rev=186 --- 0001-libelf-Sync-elf.h-from-glibc.patch | 210 ++++++++++++++++++ ...ndle-new-RISC-V-specific-definitions.patch | 84 +++++++ ...zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch | 32 +++ ...HT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch | 26 +++ ...Add-RISC-V-object-attribute-printing.patch | 130 +++++++++++ elfutils.changes | 10 + elfutils.spec | 6 + 7 files changed, 498 insertions(+) create mode 100644 0001-libelf-Sync-elf.h-from-glibc.patch create mode 100644 0002-backends-Handle-new-RISC-V-specific-definitions.patch create mode 100644 0003-elflint-Allow-zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch create mode 100644 0004-readelf-Handle-SHT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch create mode 100644 0005-backends-Add-RISC-V-object-attribute-printing.patch diff --git a/0001-libelf-Sync-elf.h-from-glibc.patch b/0001-libelf-Sync-elf.h-from-glibc.patch new file mode 100644 index 0000000..5b64dd5 --- /dev/null +++ b/0001-libelf-Sync-elf.h-from-glibc.patch @@ -0,0 +1,210 @@ +From de209d23e5f571f03ff0efc6547a2ebbfae3828e Mon Sep 17 00:00:00 2001 +From: Andreas Schwab +Date: Mon, 8 Aug 2022 13:44:08 +0200 +Subject: [PATCH] libelf: Sync elf.h from glibc + +Adds PT_RISCV_ATTRIBUTES, SHT_RISCV_ATTRIBUTES, PT_AARCH64_MEMTAG_MTE, +RELR definitions, LoongArch relocations. + +dwelf_elf_e_machine_string was updated to handle EM_LOONGARCH, and +ebl_dynamic_tag_name was updated to handle the new RELR dynamic tags. + +Signed-off-by: Andreas Schwab +--- + libdwelf/ChangeLog | 5 ++ + libdwelf/dwelf_elf_e_machine_string.c | 2 + + libebl/ChangeLog | 5 ++ + libebl/ebldynamictagname.c | 2 +- + libelf/ChangeLog | 4 ++ + libelf/elf.h | 99 ++++++++++++++++++++++++++- + 6 files changed, 113 insertions(+), 4 deletions(-) + +diff --git a/libdwelf/dwelf_elf_e_machine_string.c b/libdwelf/dwelf_elf_e_machine_string.c +index 051c70b5..6d588ea8 100644 +--- a/libdwelf/dwelf_elf_e_machine_string.c ++++ b/libdwelf/dwelf_elf_e_machine_string.c +@@ -398,6 +398,8 @@ dwelf_elf_e_machine_string (int machine) + return "BPF"; + case EM_CSKY: + return "C-SKY"; ++ case EM_LOONGARCH: ++ return "LoongArch"; + + case EM_ALPHA: + return "Alpha"; +diff --git a/libebl/ebldynamictagname.c b/libebl/ebldynamictagname.c +index 3f8d8ee4..5d4a3a58 100644 +--- a/libebl/ebldynamictagname.c ++++ b/libebl/ebldynamictagname.c +@@ -54,7 +54,7 @@ ebl_dynamic_tag_name (Ebl *ebl, int64_t tag, char *buf, size_t len) + "RELENT", "PLTREL", "DEBUG", "TEXTREL", "JMPREL", "BIND_NOW", + "INIT_ARRAY", "FINI_ARRAY", "INIT_ARRAYSZ", "FINI_ARRAYSZ", + "RUNPATH", "FLAGS", "ENCODING", "PREINIT_ARRAY", +- "PREINIT_ARRAYSZ", "SYMTAB_SHNDX" ++ "PREINIT_ARRAYSZ", "SYMTAB_SHNDX", "RELRSZ", "RELR", "RELRENT" + }; + eu_static_assert (sizeof (stdtags) / sizeof (const char *) == DT_NUM); + +diff --git a/libelf/elf.h b/libelf/elf.h +index 0735f6b5..02a1b3f5 100644 +--- a/libelf/elf.h ++++ b/libelf/elf.h +@@ -358,8 +358,9 @@ typedef struct + + #define EM_BPF 247 /* Linux BPF -- in-kernel virtual machine */ + #define EM_CSKY 252 /* C-SKY */ ++#define EM_LOONGARCH 258 /* LoongArch */ + +-#define EM_NUM 253 ++#define EM_NUM 259 + + /* Old spellings/synonyms. */ + +@@ -443,7 +444,8 @@ typedef struct + #define SHT_PREINIT_ARRAY 16 /* Array of pre-constructors */ + #define SHT_GROUP 17 /* Section group */ + #define SHT_SYMTAB_SHNDX 18 /* Extended section indices */ +-#define SHT_NUM 19 /* Number of defined types. */ ++#define SHT_RELR 19 /* RELR relative relocations */ ++#define SHT_NUM 20 /* Number of defined types. */ + #define SHT_LOOS 0x60000000 /* Start OS-specific. */ + #define SHT_GNU_ATTRIBUTES 0x6ffffff5 /* Object attributes. */ + #define SHT_GNU_HASH 0x6ffffff6 /* GNU-style hash table. */ +@@ -662,6 +664,11 @@ typedef struct + Elf64_Sxword r_addend; /* Addend */ + } Elf64_Rela; + ++/* RELR relocation table entry */ ++ ++typedef Elf32_Word Elf32_Relr; ++typedef Elf64_Xword Elf64_Relr; ++ + /* How to extract and insert information held in the r_info field. */ + + #define ELF32_R_SYM(val) ((val) >> 8) +@@ -887,7 +894,10 @@ typedef struct + #define DT_PREINIT_ARRAY 32 /* Array with addresses of preinit fct*/ + #define DT_PREINIT_ARRAYSZ 33 /* size in bytes of DT_PREINIT_ARRAY */ + #define DT_SYMTAB_SHNDX 34 /* Address of SYMTAB_SHNDX section */ +-#define DT_NUM 35 /* Number used */ ++#define DT_RELRSZ 35 /* Total size of RELR relative relocations */ ++#define DT_RELR 36 /* Address of RELR relative relocations */ ++#define DT_RELRENT 37 /* Size of one RELR relative relocaction */ ++#define DT_NUM 38 /* Number used */ + #define DT_LOOS 0x6000000d /* Start of OS-specific */ + #define DT_HIOS 0x6ffff000 /* End of OS-specific */ + #define DT_LOPROC 0x70000000 /* Start of processor-specific */ +@@ -2893,6 +2903,9 @@ enum + #define R_AARCH64_TLSDESC 1031 /* TLS Descriptor. */ + #define R_AARCH64_IRELATIVE 1032 /* STT_GNU_IFUNC relocation. */ + ++/* MTE memory tag segment type. */ ++#define PT_AARCH64_MEMTAG_MTE (PT_LOPROC + 2) ++ + /* AArch64 specific values for the Dyn d_tag field. */ + #define DT_AARCH64_BTI_PLT (DT_LOPROC + 1) + #define DT_AARCH64_PAC_PLT (DT_LOPROC + 3) +@@ -3918,6 +3931,8 @@ enum + #define EF_RISCV_FLOAT_ABI_SINGLE 0x0002 + #define EF_RISCV_FLOAT_ABI_DOUBLE 0x0004 + #define EF_RISCV_FLOAT_ABI_QUAD 0x0006 ++#define EF_RISCV_RVE 0x0008 ++#define EF_RISCV_TSO 0x0010 + + /* RISC-V relocations. */ + #define R_RISCV_NONE 0 +@@ -3978,6 +3993,19 @@ enum + + #define R_RISCV_NUM 59 + ++/* RISC-V specific values for the st_other field. */ ++#define STO_RISCV_VARIANT_CC 0x80 /* Function uses variant calling ++ convention */ ++ ++/* RISC-V specific values for the sh_type field. */ ++#define SHT_RISCV_ATTRIBUTES (SHT_LOPROC + 3) ++ ++/* RISC-V specific values for the p_type field. */ ++#define PT_RISCV_ATTRIBUTES (PT_LOPROC + 3) ++ ++/* RISC-V specific values for the d_tag field. */ ++#define DT_RISCV_VARIANT_CC (DT_LOPROC + 1) ++ + /* BPF specific declarations. */ + + #define R_BPF_NONE 0 /* No reloc */ +@@ -4056,6 +4084,71 @@ enum + #define R_NDS32_TLS_TPOFF 102 + #define R_NDS32_TLS_DESC 119 + ++/* LoongArch ELF Flags */ ++#define EF_LARCH_ABI 0x07 ++#define EF_LARCH_ABI_LP64D 0x03 ++ ++/* LoongArch specific dynamic relocations */ ++#define R_LARCH_NONE 0 ++#define R_LARCH_32 1 ++#define R_LARCH_64 2 ++#define R_LARCH_RELATIVE 3 ++#define R_LARCH_COPY 4 ++#define R_LARCH_JUMP_SLOT 5 ++#define R_LARCH_TLS_DTPMOD32 6 ++#define R_LARCH_TLS_DTPMOD64 7 ++#define R_LARCH_TLS_DTPREL32 8 ++#define R_LARCH_TLS_DTPREL64 9 ++#define R_LARCH_TLS_TPREL32 10 ++#define R_LARCH_TLS_TPREL64 11 ++#define R_LARCH_IRELATIVE 12 ++ ++/* Reserved for future relocs that the dynamic linker must understand. */ ++ ++/* used by the static linker for relocating .text. */ ++#define R_LARCH_MARK_LA 20 ++#define R_LARCH_MARK_PCREL 21 ++#define R_LARCH_SOP_PUSH_PCREL 22 ++#define R_LARCH_SOP_PUSH_ABSOLUTE 23 ++#define R_LARCH_SOP_PUSH_DUP 24 ++#define R_LARCH_SOP_PUSH_GPREL 25 ++#define R_LARCH_SOP_PUSH_TLS_TPREL 26 ++#define R_LARCH_SOP_PUSH_TLS_GOT 27 ++#define R_LARCH_SOP_PUSH_TLS_GD 28 ++#define R_LARCH_SOP_PUSH_PLT_PCREL 29 ++#define R_LARCH_SOP_ASSERT 30 ++#define R_LARCH_SOP_NOT 31 ++#define R_LARCH_SOP_SUB 32 ++#define R_LARCH_SOP_SL 33 ++#define R_LARCH_SOP_SR 34 ++#define R_LARCH_SOP_ADD 35 ++#define R_LARCH_SOP_AND 36 ++#define R_LARCH_SOP_IF_ELSE 37 ++#define R_LARCH_SOP_POP_32_S_10_5 38 ++#define R_LARCH_SOP_POP_32_U_10_12 39 ++#define R_LARCH_SOP_POP_32_S_10_12 40 ++#define R_LARCH_SOP_POP_32_S_10_16 41 ++#define R_LARCH_SOP_POP_32_S_10_16_S2 42 ++#define R_LARCH_SOP_POP_32_S_5_20 43 ++#define R_LARCH_SOP_POP_32_S_0_5_10_16_S2 44 ++#define R_LARCH_SOP_POP_32_S_0_10_10_16_S2 45 ++#define R_LARCH_SOP_POP_32_U 46 ++ ++/* used by the static linker for relocating non .text. */ ++#define R_LARCH_ADD8 47 ++#define R_LARCH_ADD16 48 ++#define R_LARCH_ADD24 49 ++#define R_LARCH_ADD32 50 ++#define R_LARCH_ADD64 51 ++#define R_LARCH_SUB8 52 ++#define R_LARCH_SUB16 53 ++#define R_LARCH_SUB24 54 ++#define R_LARCH_SUB32 55 ++#define R_LARCH_SUB64 56 ++#define R_LARCH_GNU_VTINHERIT 57 ++#define R_LARCH_GNU_VTENTRY 58 ++ ++ + /* ARCompact/ARCv2 specific relocs. */ + #define R_ARC_NONE 0x0 + #define R_ARC_8 0x1 +-- +2.37.1 + diff --git a/0002-backends-Handle-new-RISC-V-specific-definitions.patch b/0002-backends-Handle-new-RISC-V-specific-definitions.patch new file mode 100644 index 0000000..6e2efe2 --- /dev/null +++ b/0002-backends-Handle-new-RISC-V-specific-definitions.patch @@ -0,0 +1,84 @@ +From adc0b8434a4bcef2baa515a252e4675dfbc264b7 Mon Sep 17 00:00:00 2001 +From: Andreas Schwab +Date: Mon, 8 Aug 2022 11:07:19 +0200 +Subject: [PATCH] backends: Handle new RISC-V specific definitions + +Handle PT_RISCV_ATTRIBUTES, SHT_RISCV_ATTRIBUTES, DT_RISCV_VARIANT_CC. + +Signed-off-by: Andreas Schwab +--- + backends/riscv_init.c | 4 ++++ + backends/riscv_symbol.c | 45 +++++++++++++++++++++++++++++++++++++++++ + 2 files changed, 49 insertions(+) + +diff --git a/backends/riscv_init.c b/backends/riscv_init.c +index 141e0821..f2d46082 100644 +--- a/backends/riscv_init.c ++++ b/backends/riscv_init.c +@@ -65,6 +65,10 @@ riscv_init (Elf *elf, + HOOK (eh, check_special_symbol); + HOOK (eh, machine_flag_check); + HOOK (eh, set_initial_registers_tid); ++ HOOK (eh, segment_type_name); ++ HOOK (eh, section_type_name); ++ HOOK (eh, dynamic_tag_name); ++ HOOK (eh, dynamic_tag_check); + if (eh->class == ELFCLASS64) + eh->core_note = riscv64_core_note; + else +diff --git a/backends/riscv_symbol.c b/backends/riscv_symbol.c +index c34b7702..c149b8ba 100644 +--- a/backends/riscv_symbol.c ++++ b/backends/riscv_symbol.c +@@ -119,3 +119,48 @@ riscv_check_special_symbol (Elf *elf, const GElf_Sym *sym, + + return false; + } ++ ++const char * ++riscv_segment_type_name (int segment, char *buf __attribute__ ((unused)), ++ size_t len __attribute__ ((unused))) ++{ ++ switch (segment) ++ { ++ case PT_RISCV_ATTRIBUTES: ++ return "RISCV_ATTRIBUTES"; ++ } ++ return NULL; ++} ++ ++/* Return symbolic representation of section type. */ ++const char * ++riscv_section_type_name (int type, ++ char *buf __attribute__ ((unused)), ++ size_t len __attribute__ ((unused))) ++{ ++ switch (type) ++ { ++ case SHT_RISCV_ATTRIBUTES: ++ return "RISCV_ATTRIBUTES"; ++ } ++ ++ return NULL; ++} ++ ++const char * ++riscv_dynamic_tag_name (int64_t tag, char *buf __attribute__ ((unused)), ++ size_t len __attribute__ ((unused))) ++{ ++ switch (tag) ++ { ++ case DT_RISCV_VARIANT_CC: ++ return "RISCV_VARIANT_CC"; ++ } ++ return NULL; ++} ++ ++bool ++riscv_dynamic_tag_check (int64_t tag) ++{ ++ return tag == DT_RISCV_VARIANT_CC; ++} +-- +2.37.1 + diff --git a/0003-elflint-Allow-zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch b/0003-elflint-Allow-zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch new file mode 100644 index 0000000..399e1a6 --- /dev/null +++ b/0003-elflint-Allow-zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch @@ -0,0 +1,32 @@ +From 1a7a4774f1e60d10e956fbc7d376f4e7222e2abb Mon Sep 17 00:00:00 2001 +From: Andreas Schwab +Date: Mon, 8 Aug 2022 13:13:16 +0200 +Subject: [PATCH] elflint: Allow zero p_memsz for PT_RISCV_ATTRIBUTES + +The RISCV_ATTRIBUTES segment is not meant to be loaded. + +Signed-off-by: Andreas Schwab +--- + src/ChangeLog | 5 +++++ + src/elflint.c | 5 ++++- + 2 files changed, 9 insertions(+), 1 deletion(-) + +diff --git a/src/elflint.c b/src/elflint.c +index d919936f..b0e5415e 100644 +--- a/src/elflint.c ++++ b/src/elflint.c +@@ -4731,7 +4731,10 @@ section [%2zu] '%s' must not be executable\n"), + } + + if (phdr->p_filesz > phdr->p_memsz +- && (phdr->p_memsz != 0 || phdr->p_type != PT_NOTE)) ++ && (phdr->p_memsz != 0 ++ || (phdr->p_type != PT_NOTE ++ && !(ehdr->e_machine == EM_RISCV ++ && phdr->p_type == PT_RISCV_ATTRIBUTES)))) + ERROR (_("\ + program header entry %d: file size greater than memory size\n"), + cnt); +-- +2.37.1 + diff --git a/0004-readelf-Handle-SHT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch b/0004-readelf-Handle-SHT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch new file mode 100644 index 0000000..0044e18 --- /dev/null +++ b/0004-readelf-Handle-SHT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch @@ -0,0 +1,26 @@ +From e447ecbbffb1d3f9d776b94392e76e37a1b5fd19 Mon Sep 17 00:00:00 2001 +From: Andreas Schwab +Date: Mon, 8 Aug 2022 11:11:04 +0200 +Subject: [PATCH] readelf: Handle SHT_RISCV_ATTRIBUTES like SHT_GNU_ATTRIBUTES + +Signed-off-by: Andreas Schwab +--- + src/readelf.c | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/src/readelf.c b/src/readelf.c +index f1f77ce8..e8317f98 100644 +--- a/src/readelf.c ++++ b/src/readelf.c +@@ -3671,6 +3671,8 @@ print_attributes (Ebl *ebl, const GElf_Ehdr *ehdr) + if (shdr == NULL || (shdr->sh_type != SHT_GNU_ATTRIBUTES + && (shdr->sh_type != SHT_ARM_ATTRIBUTES + || ehdr->e_machine != EM_ARM) ++ && (shdr->sh_type != SHT_RISCV_ATTRIBUTES ++ || ehdr->e_machine != EM_RISCV) + && (shdr->sh_type != SHT_CSKY_ATTRIBUTES + || ehdr->e_machine != EM_CSKY))) + continue; +-- +2.37.1 + diff --git a/0005-backends-Add-RISC-V-object-attribute-printing.patch b/0005-backends-Add-RISC-V-object-attribute-printing.patch new file mode 100644 index 0000000..a2c5292 --- /dev/null +++ b/0005-backends-Add-RISC-V-object-attribute-printing.patch @@ -0,0 +1,130 @@ +From 04b83727c0a48e8d6f4c7e633886439cc1e8a7b3 Mon Sep 17 00:00:00 2001 +From: Andreas Schwab +Date: Mon, 8 Aug 2022 13:35:20 +0200 +Subject: [PATCH] backends: Add RISC-V object attribute printing + +Signed-off-by: Andreas Schwab +--- + backends/ChangeLog | 6 ++++ + backends/Makefile.am | 3 +- + backends/riscv_attrs.c | 80 ++++++++++++++++++++++++++++++++++++++++++ + backends/riscv_init.c | 2 ++ + 4 files changed, 90 insertions(+), 1 deletion(-) + create mode 100644 backends/riscv_attrs.c + +diff --git a/backends/Makefile.am b/backends/Makefile.am +index 9566377f..1863f66a 100644 +--- a/backends/Makefile.am ++++ b/backends/Makefile.am +@@ -91,7 +91,8 @@ m68k_corenote_no_Wpacked_not_aligned = yes + bpf_SRCS = bpf_init.c bpf_regs.c bpf_symbol.c + + riscv_SRCS = riscv_init.c riscv_symbol.c riscv_cfi.c riscv_regs.c \ +- riscv_initreg.c riscv_corenote.c riscv64_corenote.c riscv_retval.c ++ riscv_initreg.c riscv_corenote.c riscv64_corenote.c \ ++ riscv_retval.c riscv_attrs.c + + csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \ + csky_regs.c csky_initreg.c csky_corenote.c +diff --git a/backends/riscv_attrs.c b/backends/riscv_attrs.c +new file mode 100644 +index 00000000..d74aac5c +--- /dev/null ++++ b/backends/riscv_attrs.c +@@ -0,0 +1,80 @@ ++/* RISC-V ABI-specified defaults for DWARF CFI. ++ This file is part of elfutils. ++ ++ This file is free software; you can redistribute it and/or modify ++ it under the terms of either ++ ++ * the GNU Lesser General Public License as published by the Free ++ Software Foundation; either version 3 of the License, or (at ++ your option) any later version ++ ++ or ++ ++ * the GNU General Public License as published by the Free ++ Software Foundation; either version 2 of the License, or (at ++ your option) any later version ++ ++ or both in parallel, as here. ++ ++ elfutils is distributed in the hope that it will be useful, but ++ WITHOUT ANY WARRANTY; without even the implied warranty of ++ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU ++ General Public License for more details. ++ ++ You should have received copies of the GNU General Public License and ++ the GNU Lesser General Public License along with this program. If ++ not, see . */ ++ ++#ifdef HAVE_CONFIG_H ++# include ++#endif ++ ++#include ++#include ++ ++#define BACKEND riscv_ ++#include "libebl_CPU.h" ++ ++#define KNOWN_VALUES(...) do \ ++ { \ ++ static const char *table[] = { __VA_ARGS__ }; \ ++ if (value < sizeof table / sizeof table[0]) \ ++ *value_name = table[value]; \ ++ } while (0) ++ ++bool ++riscv_check_object_attribute (Ebl *ebl __attribute__ ((unused)), ++ const char *vendor, int tag, uint64_t value, ++ const char **tag_name, const char **value_name) ++{ ++ if (!strcmp (vendor, "riscv")) ++ switch (tag) ++ { ++ case 4: ++ *tag_name = "RISCV_stack_align"; ++ return true; ++ ++ case 5: ++ *tag_name = "RISCV_arch"; ++ return true; ++ ++ case 6: ++ *tag_name = "RISCV_unaligned_access"; ++ KNOWN_VALUES ("No unaligned access", "Unaligned access"); ++ return true; ++ ++ case 8: ++ *tag_name = "RISCV_priv_spec"; ++ return true; ++ ++ case 10: ++ *tag_name = "RISCV_priv_spec_minor"; ++ return true; ++ ++ case 12: ++ *tag_name = "RISCV_priv_spec_revision"; ++ return true; ++ } ++ ++ return false; ++} +diff --git a/backends/riscv_init.c b/backends/riscv_init.c +index f2d46082..e5e9e33e 100644 +--- a/backends/riscv_init.c ++++ b/backends/riscv_init.c +@@ -69,6 +69,8 @@ riscv_init (Elf *elf, + HOOK (eh, section_type_name); + HOOK (eh, dynamic_tag_name); + HOOK (eh, dynamic_tag_check); ++ HOOK (eh, check_object_attribute); ++ HOOK (eh, set_initial_registers_tid); + if (eh->class == ELFCLASS64) + eh->core_note = riscv64_core_note; + else +-- +2.37.1 + diff --git a/elfutils.changes b/elfutils.changes index 1385657..74f3d6a 100644 --- a/elfutils.changes +++ b/elfutils.changes @@ -1,3 +1,13 @@ +------------------------------------------------------------------- +Fri Oct 14 08:55:22 UTC 2022 - Martin Liška + +- Add RISC-V specific patches: + * 0001-libelf-Sync-elf.h-from-glibc.patch + * 0002-backends-Handle-new-RISC-V-specific-definitions.patch + * 0003-elflint-Allow-zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch + * 0004-readelf-Handle-SHT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch + * 0005-backends-Add-RISC-V-object-attribute-printing.patch + ------------------------------------------------------------------- Tue Apr 26 07:16:29 UTC 2022 - Martin Liška diff --git a/elfutils.spec b/elfutils.spec index 058d69f..f6bf389 100644 --- a/elfutils.spec +++ b/elfutils.spec @@ -40,6 +40,12 @@ BuildRequires: libzstd-devel BuildRequires: xz-devel BuildRequires: zlib-devel +Patch24300: 0001-libelf-Sync-elf.h-from-glibc.patch +Patch24301: 0002-backends-Handle-new-RISC-V-specific-definitions.patch +Patch24302: 0003-elflint-Allow-zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch +Patch24303: 0004-readelf-Handle-SHT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch +Patch24304: 0005-backends-Add-RISC-V-object-attribute-printing.patch + %description elfutils is a collection of utilities and libraries to read, create and modify ELF binary files, find and handle DWARF debug data,