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elfutils/0005-backends-Add-RISC-V-object-attribute-printing.patch
Martin Liška f9063f0adf Accepting request 1010630 from home:marxin:branches:Base:System
- Add RISC-V specific patches:
  * 0001-libelf-Sync-elf.h-from-glibc.patch
  * 0002-backends-Handle-new-RISC-V-specific-definitions.patch
  * 0003-elflint-Allow-zero-p_memsz-for-PT_RISCV_ATTRIBUTES.patch
  * 0004-readelf-Handle-SHT_RISCV_ATTRIBUTES-like-SHT_GNU_ATT.patch
  * 0005-backends-Add-RISC-V-object-attribute-printing.patch

OBS-URL: https://build.opensuse.org/request/show/1010630
OBS-URL: https://build.opensuse.org/package/show/Base:System/elfutils?expand=0&rev=186
2022-10-14 09:00:43 +00:00

131 lines
3.8 KiB
Diff

From 04b83727c0a48e8d6f4c7e633886439cc1e8a7b3 Mon Sep 17 00:00:00 2001
From: Andreas Schwab <schwab@suse.de>
Date: Mon, 8 Aug 2022 13:35:20 +0200
Subject: [PATCH] backends: Add RISC-V object attribute printing
Signed-off-by: Andreas Schwab <schwab@suse.de>
---
backends/ChangeLog | 6 ++++
backends/Makefile.am | 3 +-
backends/riscv_attrs.c | 80 ++++++++++++++++++++++++++++++++++++++++++
backends/riscv_init.c | 2 ++
4 files changed, 90 insertions(+), 1 deletion(-)
create mode 100644 backends/riscv_attrs.c
diff --git a/backends/Makefile.am b/backends/Makefile.am
index 9566377f..1863f66a 100644
--- a/backends/Makefile.am
+++ b/backends/Makefile.am
@@ -91,7 +91,8 @@ m68k_corenote_no_Wpacked_not_aligned = yes
bpf_SRCS = bpf_init.c bpf_regs.c bpf_symbol.c
riscv_SRCS = riscv_init.c riscv_symbol.c riscv_cfi.c riscv_regs.c \
- riscv_initreg.c riscv_corenote.c riscv64_corenote.c riscv_retval.c
+ riscv_initreg.c riscv_corenote.c riscv64_corenote.c \
+ riscv_retval.c riscv_attrs.c
csky_SRCS = csky_attrs.c csky_init.c csky_symbol.c csky_cfi.c \
csky_regs.c csky_initreg.c csky_corenote.c
diff --git a/backends/riscv_attrs.c b/backends/riscv_attrs.c
new file mode 100644
index 00000000..d74aac5c
--- /dev/null
+++ b/backends/riscv_attrs.c
@@ -0,0 +1,80 @@
+/* RISC-V ABI-specified defaults for DWARF CFI.
+ This file is part of elfutils.
+
+ This file is free software; you can redistribute it and/or modify
+ it under the terms of either
+
+ * the GNU Lesser General Public License as published by the Free
+ Software Foundation; either version 3 of the License, or (at
+ your option) any later version
+
+ or
+
+ * the GNU General Public License as published by the Free
+ Software Foundation; either version 2 of the License, or (at
+ your option) any later version
+
+ or both in parallel, as here.
+
+ elfutils is distributed in the hope that it will be useful, but
+ WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
+ General Public License for more details.
+
+ You should have received copies of the GNU General Public License and
+ the GNU Lesser General Public License along with this program. If
+ not, see <http://www.gnu.org/licenses/>. */
+
+#ifdef HAVE_CONFIG_H
+# include <config.h>
+#endif
+
+#include <string.h>
+#include <dwarf.h>
+
+#define BACKEND riscv_
+#include "libebl_CPU.h"
+
+#define KNOWN_VALUES(...) do \
+ { \
+ static const char *table[] = { __VA_ARGS__ }; \
+ if (value < sizeof table / sizeof table[0]) \
+ *value_name = table[value]; \
+ } while (0)
+
+bool
+riscv_check_object_attribute (Ebl *ebl __attribute__ ((unused)),
+ const char *vendor, int tag, uint64_t value,
+ const char **tag_name, const char **value_name)
+{
+ if (!strcmp (vendor, "riscv"))
+ switch (tag)
+ {
+ case 4:
+ *tag_name = "RISCV_stack_align";
+ return true;
+
+ case 5:
+ *tag_name = "RISCV_arch";
+ return true;
+
+ case 6:
+ *tag_name = "RISCV_unaligned_access";
+ KNOWN_VALUES ("No unaligned access", "Unaligned access");
+ return true;
+
+ case 8:
+ *tag_name = "RISCV_priv_spec";
+ return true;
+
+ case 10:
+ *tag_name = "RISCV_priv_spec_minor";
+ return true;
+
+ case 12:
+ *tag_name = "RISCV_priv_spec_revision";
+ return true;
+ }
+
+ return false;
+}
diff --git a/backends/riscv_init.c b/backends/riscv_init.c
index f2d46082..e5e9e33e 100644
--- a/backends/riscv_init.c
+++ b/backends/riscv_init.c
@@ -69,6 +69,8 @@ riscv_init (Elf *elf,
HOOK (eh, section_type_name);
HOOK (eh, dynamic_tag_name);
HOOK (eh, dynamic_tag_check);
+ HOOK (eh, check_object_attribute);
+ HOOK (eh, set_initial_registers_tid);
if (eh->class == ELFCLASS64)
eh->core_note = riscv64_core_note;
else
--
2.37.1