SHA256
3
0
forked from pool/libffi

Accepting request 1159781 from devel:libraries:c_c++

- Add patches to fix BTI on aarch64:
  * 830.patch
- Update to 3.4.6:
  * Fix long double regression on mips64 and alpha.
- Update to 3.4.5:
  * Add support for wasm32.
  * Add support for aarch64 branch target identification (bti).
  * Add support for ARCv3: ARC32 & ARC64.
  * Add support for HPPA64, and many HPPA fixes.
  * Add support for Haikuos on PowerPC.
  * Fixes for AIX, loongson, MIPS, power, sparc64, and x86 Darwin.
- Drop upstreamed patches:
  * 808.patch
  * 810.patch (forwarded request 1159617 from Guillaume_G)

OBS-URL: https://build.opensuse.org/request/show/1159781
OBS-URL: https://build.opensuse.org/package/show/openSUSE:Factory/libffi?expand=0&rev=16
This commit is contained in:
Ana Guerrero 2024-03-21 15:59:52 +00:00 committed by Git OBS Bridge
commit 0d164d0afb
7 changed files with 114 additions and 889 deletions

457
808.patch
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@ -1,457 +0,0 @@
From cdb7b8c44f23d850d0fc5d783cb42f1bc516252f Mon Sep 17 00:00:00 2001
From: Tobias Heider <me@tobhe.de>
Date: Wed, 22 Nov 2023 15:21:56 +0100
Subject: [PATCH] Add bti intructions to aarch64 assembly to work with strict
BTI enforcement on OpenBSD.
---
src/aarch64/ffi.c | 38 +++++---
src/aarch64/sysv.S | 223 +++++++++++++++++++++++++++++++++++----------
2 files changed, 202 insertions(+), 59 deletions(-)
diff --git a/src/aarch64/ffi.c b/src/aarch64/ffi.c
index 6544ac0fe..67b18fbfb 100644
--- a/src/aarch64/ffi.c
+++ b/src/aarch64/ffi.c
@@ -390,47 +390,59 @@ extend_hfa_type (void *dest, void *src, int h)
"adr %0, 0f\n"
" add %0, %0, %1\n"
" br %0\n"
-"0: ldp s16, s17, [%3]\n" /* S4 */
+"0: bti j\n" /* S4 */
+" ldp s16, s17, [%3]\n"
" ldp s18, s19, [%3, #8]\n"
" b 4f\n"
-" ldp s16, s17, [%3]\n" /* S3 */
+" bti j\n" /* S3 */
+" ldp s16, s17, [%3]\n"
" ldr s18, [%3, #8]\n"
" b 3f\n"
-" ldp s16, s17, [%3]\n" /* S2 */
+" bti j\n" /* S2 */
+" ldp s16, s17, [%3]\n"
" b 2f\n"
" nop\n"
-" ldr s16, [%3]\n" /* S1 */
+" bti j\n" /* S1 */
+" ldr s16, [%3]\n"
" b 1f\n"
" nop\n"
-" ldp d16, d17, [%3]\n" /* D4 */
+" bti j\n" /* D4 */
+" ldp d16, d17, [%3]\n"
" ldp d18, d19, [%3, #16]\n"
" b 4f\n"
-" ldp d16, d17, [%3]\n" /* D3 */
+" bti j\n" /* D3 */
+" ldp d16, d17, [%3]\n"
" ldr d18, [%3, #16]\n"
" b 3f\n"
-" ldp d16, d17, [%3]\n" /* D2 */
+" bti j\n" /* D2 */
+" ldp d16, d17, [%3]\n"
" b 2f\n"
" nop\n"
-" ldr d16, [%3]\n" /* D1 */
+" bti j\n" /* D1 */
+" ldr d16, [%3]\n"
" b 1f\n"
" nop\n"
-" ldp q16, q17, [%3]\n" /* Q4 */
+" bti j\n" /* Q4 */
+" ldp q16, q17, [%3]\n"
" ldp q18, q19, [%3, #32]\n"
" b 4f\n"
-" ldp q16, q17, [%3]\n" /* Q3 */
+" bti j\n" /* Q3 */
+" ldp q16, q17, [%3]\n"
" ldr q18, [%3, #32]\n"
" b 3f\n"
-" ldp q16, q17, [%3]\n" /* Q2 */
+" bti j\n" /* Q2 */
+" ldp q16, q17, [%3]\n"
" b 2f\n"
" nop\n"
-" ldr q16, [%3]\n" /* Q1 */
+" bti j\n" /* Q1 */
+" ldr q16, [%3]\n"
" b 1f\n"
"4: str q19, [%2, #48]\n"
"3: str q18, [%2, #32]\n"
"2: str q17, [%2, #16]\n"
"1: str q16, [%2]"
: "=&r"(x0)
- : "r"(f * 12), "r"(dest), "r"(src)
+ : "r"(f * 16), "r"(dest), "r"(src)
: "memory", "v16", "v17", "v18", "v19");
}
#endif
diff --git a/src/aarch64/sysv.S b/src/aarch64/sysv.S
index 286f1f137..9f4188e00 100644
--- a/src/aarch64/sysv.S
+++ b/src/aarch64/sysv.S
@@ -84,6 +84,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
cfi_startproc
CNAME(ffi_call_SYSV):
+ bti c
/* Sign the lr with x1 since that is where it will be stored */
SIGN_LR_WITH_REG(x1)
@@ -144,78 +145,142 @@ CNAME(ffi_call_SYSV):
/* Save the return value as directed. */
adr x5, 0f
and w4, w4, #AARCH64_RET_MASK
- add x5, x5, x4, lsl #3
+ add x5, x5, x4, lsl #4
br x5
- /* Note that each table entry is 2 insns, and thus 8 bytes.
+ /* Note that each table entry is 4 insns, and thus 16 bytes.
For integer data, note that we're storing into ffi_arg
and therefore we want to extend to 64 bits; these types
have two consecutive entries allocated for them. */
.align 4
-0: b 99f /* VOID */
+0: bti j /* VOID */
+ b 99f
+ nop
nop
-1: str x0, [x3] /* INT64 */
+1: bti j /* INT64 */
+ str x0, [x3]
b 99f
-2: stp x0, x1, [x3] /* INT128 */
+ nop
+2: bti j /* INT128 */
+ stp x0, x1, [x3]
b 99f
+ nop
3: brk #1000 /* UNUSED */
b 99f
+ nop
+ nop
4: brk #1000 /* UNUSED */
b 99f
+ nop
+ nop
5: brk #1000 /* UNUSED */
b 99f
+ nop
+ nop
6: brk #1000 /* UNUSED */
b 99f
+ nop
+ nop
7: brk #1000 /* UNUSED */
b 99f
-8: st4 { v0.s, v1.s, v2.s, v3.s }[0], [x3] /* S4 */
+ nop
+ nop
+8: bti j /* S4 */
+ st4 { v0.s, v1.s, v2.s, v3.s }[0], [x3]
b 99f
-9: st3 { v0.s, v1.s, v2.s }[0], [x3] /* S3 */
+ nop
+9: bti j /* S3 */
+ st3 { v0.s, v1.s, v2.s }[0], [x3]
b 99f
-10: stp s0, s1, [x3] /* S2 */
+ nop
+10: bti j /* S2 */
+ stp s0, s1, [x3]
b 99f
-11: str s0, [x3] /* S1 */
+ nop
+11: bti j
+ str s0, [x3] /* S1 */
b 99f
-12: st4 { v0.d, v1.d, v2.d, v3.d }[0], [x3] /* D4 */
+ nop
+12: bti j /* D4 */
+ st4 { v0.d, v1.d, v2.d, v3.d }[0], [x3]
b 99f
-13: st3 { v0.d, v1.d, v2.d }[0], [x3] /* D3 */
+ nop
+13: bti j /* D3 */
+ st3 { v0.d, v1.d, v2.d }[0], [x3]
b 99f
-14: stp d0, d1, [x3] /* D2 */
+ nop
+14: bti j /* D2 */
+ stp d0, d1, [x3]
b 99f
-15: str d0, [x3] /* D1 */
+ nop
+15: bti j /* D1 */
+ str d0, [x3]
b 99f
-16: str q3, [x3, #48] /* Q4 */
nop
-17: str q2, [x3, #32] /* Q3 */
+16: bti j /* Q4 */
+ str q3, [x3, #48]
+ nop
nop
-18: stp q0, q1, [x3] /* Q2 */
+17: bti j /* Q3 */
+ str q2, [x3, #32]
+ nop
+ nop
+18: bti j /* Q2 */
+ stp q0, q1, [x3]
b 99f
-19: str q0, [x3] /* Q1 */
+ nop
+19: bti j /* Q1 */
+ str q0, [x3]
b 99f
-20: uxtb w0, w0 /* UINT8 */
+ nop
+20: bti j /* UINT8 */
+ uxtb w0, w0
str x0, [x3]
+ nop
21: b 99f /* reserved */
nop
-22: uxth w0, w0 /* UINT16 */
+ nop
+ nop
+22: bti j /* UINT16 */
+ uxth w0, w0
str x0, [x3]
+ nop
23: b 99f /* reserved */
nop
-24: mov w0, w0 /* UINT32 */
+ nop
+ nop
+24: bti j /* UINT32 */
+ mov w0, w0
str x0, [x3]
+ nop
25: b 99f /* reserved */
nop
-26: sxtb x0, w0 /* SINT8 */
+ nop
+ nop
+26: bti j /* SINT8 */
+ sxtb x0, w0
str x0, [x3]
+ nop
27: b 99f /* reserved */
nop
-28: sxth x0, w0 /* SINT16 */
+ nop
+ nop
+28: bti j /* SINT16 */
+ sxth x0, w0
str x0, [x3]
+ nop
29: b 99f /* reserved */
nop
-30: sxtw x0, w0 /* SINT32 */
+ nop
+ nop
+30: bti j /* SINT32 */
+ sxtw x0, w0
str x0, [x3]
+ nop
31: b 99f /* reserved */
nop
+ nop
+ nop
/* Return now that result has been populated. */
99:
@@ -252,6 +317,7 @@ CNAME(ffi_call_SYSV):
.align 4
CNAME(ffi_closure_SYSV_V):
cfi_startproc
+ bti c
SIGN_LR
stp x29, x30, [sp, #-ffi_closure_SYSV_FS]!
cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
@@ -276,6 +342,7 @@ CNAME(ffi_closure_SYSV_V):
.align 4
cfi_startproc
CNAME(ffi_closure_SYSV):
+ bti c
SIGN_LR
stp x29, x30, [sp, #-ffi_closure_SYSV_FS]!
cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
@@ -305,73 +372,135 @@ L(do_closure):
/* Load the return value as directed. */
adr x1, 0f
and w0, w0, #AARCH64_RET_MASK
- add x1, x1, x0, lsl #3
+ add x1, x1, x0, lsl #4
add x3, sp, #16+CALL_CONTEXT_SIZE
br x1
- /* Note that each table entry is 2 insns, and thus 8 bytes. */
+ /* Note that each table entry is 4 insns, and thus 16 bytes. */
.align 4
-0: b 99f /* VOID */
+0: bti j /* VOID */
+ b 99f
+ nop
nop
-1: ldr x0, [x3] /* INT64 */
+1: bti j /* INT64 */
+ ldr x0, [x3]
b 99f
-2: ldp x0, x1, [x3] /* INT128 */
+ nop
+2: bti j /* INT128 */
+ ldp x0, x1, [x3]
b 99f
+ nop
3: brk #1000 /* UNUSED */
nop
+ nop
+ nop
4: brk #1000 /* UNUSED */
nop
+ nop
+ nop
5: brk #1000 /* UNUSED */
nop
+ nop
+ nop
6: brk #1000 /* UNUSED */
nop
+ nop
+ nop
7: brk #1000 /* UNUSED */
nop
-8: ldr s3, [x3, #12] /* S4 */
nop
-9: ldr s2, [x3, #8] /* S3 */
nop
-10: ldp s0, s1, [x3] /* S2 */
+8: bti j /* S4 */
+ ldr s3, [x3, #12]
+ nop
+ nop
+9: bti j /* S3 */
+ ldr s2, [x3, #8]
+ nop
+ nop
+10: bti j /* S2 */
+ ldp s0, s1, [x3]
b 99f
-11: ldr s0, [x3] /* S1 */
+ nop
+11: bti j /* S1 */
+ ldr s0, [x3]
b 99f
-12: ldr d3, [x3, #24] /* D4 */
nop
-13: ldr d2, [x3, #16] /* D3 */
+12: bti j /* D4 */
+ ldr d3, [x3, #24]
+ nop
+ nop
+13: bti j /* D3 */
+ ldr d2, [x3, #16]
nop
-14: ldp d0, d1, [x3] /* D2 */
+ nop
+14: bti j /* D2 */
+ ldp d0, d1, [x3]
b 99f
-15: ldr d0, [x3] /* D1 */
+ nop
+15: bti j /* D1 */
+ ldr d0, [x3]
b 99f
-16: ldr q3, [x3, #48] /* Q4 */
nop
-17: ldr q2, [x3, #32] /* Q3 */
+16: bti j /* Q4 */
+ ldr q3, [x3, #48]
nop
-18: ldp q0, q1, [x3] /* Q2 */
+ nop
+17: bti j /* Q3 */
+ ldr q2, [x3, #32]
+ nop
+ nop
+18: bti j /* Q2 */
+ ldp q0, q1, [x3]
b 99f
-19: ldr q0, [x3] /* Q1 */
+ nop
+19: bti j /* Q1 */
+ ldr q0, [x3]
b 99f
-20: ldrb w0, [x3, #BE(7)] /* UINT8 */
+ nop
+20: bti j /* UINT8 */
+ ldrb w0, [x3, #BE(7)]
b 99f
+ nop
21: brk #1000 /* reserved */
nop
-22: ldrh w0, [x3, #BE(6)] /* UINT16 */
+ nop
+ nop
+22: bti j /* UINT16 */
+ ldrh w0, [x3, #BE(6)]
b 99f
+ nop
23: brk #1000 /* reserved */
nop
-24: ldr w0, [x3, #BE(4)] /* UINT32 */
+ nop
+ nop
+24: bti j /* UINT32 */
+ ldr w0, [x3, #BE(4)]
b 99f
+ nop
25: brk #1000 /* reserved */
nop
-26: ldrsb x0, [x3, #BE(7)] /* SINT8 */
+ nop
+ nop
+26: bti j /* SINT8 */
+ ldrsb x0, [x3, #BE(7)]
b 99f
+ nop
27: brk #1000 /* reserved */
nop
-28: ldrsh x0, [x3, #BE(6)] /* SINT16 */
+ nop
+ nop
+28: bti j /* SINT16 */
+ ldrsh x0, [x3, #BE(6)]
b 99f
+ nop
29: brk #1000 /* reserved */
nop
-30: ldrsw x0, [x3, #BE(4)] /* SINT32 */
+ nop
+ nop
+30: bti j /* SINT32 */
+ ldrsw x0, [x3, #BE(4)]
+ nop
nop
31: /* reserved */
99: ldp x29, x30, [sp], #ffi_closure_SYSV_FS
@@ -485,6 +614,7 @@ CNAME(ffi_closure_trampoline_table_page):
.align 4
CNAME(ffi_go_closure_SYSV_V):
cfi_startproc
+ bti c
stp x29, x30, [sp, #-ffi_closure_SYSV_FS]!
cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
cfi_rel_offset (x29, 0)
@@ -508,6 +638,7 @@ CNAME(ffi_go_closure_SYSV_V):
.align 4
cfi_startproc
CNAME(ffi_go_closure_SYSV):
+ bti c
stp x29, x30, [sp, #-ffi_closure_SYSV_FS]!
cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
cfi_rel_offset (x29, 0)

424
810.patch
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@ -1,424 +0,0 @@
From ad3b42caa238330e872ae32adea55defe7a14286 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Martin=20Storsj=C3=B6?= <martin@martin.st>
Date: Mon, 27 Nov 2023 00:39:21 +0200
Subject: [PATCH] aarch64: Write the BTI instructions as "hint" instructions
GNU binutils refuses to assemble the direct BTI instructions unless
the target architecture explicitly supports BTI, ending up with errors
such as
../src/aarch64/sysv.S: Assembler messages:
../src/aarch64/sysv.S:87: Error: selected processor does not support `bti c'
../src/aarch64/sysv.S:156: Error: selected processor does not support `bti j'
Building with -march=armv8.5-a fixes building this.
However, the BTI instructions assemble into hint instructions, that
are ignored by processors that don't implement them. Therefore it is
possible to assemble them for the baseline armv8.0-a target as well,
by replacing "bti j" with "hint #36", "bti c" with "hint #34" and
"bti jc" with "hint #38"; this assembles into the same instruction
bits.
---
src/aarch64/ffi.c | 25 ++++++------
src/aarch64/sysv.S | 97 ++++++++++++++++++++++++----------------------
2 files changed, 63 insertions(+), 59 deletions(-)
diff --git a/src/aarch64/ffi.c b/src/aarch64/ffi.c
index 67b18fbf..8661a352 100644
--- a/src/aarch64/ffi.c
+++ b/src/aarch64/ffi.c
@@ -386,55 +386,56 @@ extend_hfa_type (void *dest, void *src, int h)
ssize_t f = h - AARCH64_RET_S4;
void *x0;
+#define BTI_J "hint #36"
asm volatile (
"adr %0, 0f\n"
" add %0, %0, %1\n"
" br %0\n"
-"0: bti j\n" /* S4 */
+"0: "BTI_J"\n" /* S4 */
" ldp s16, s17, [%3]\n"
" ldp s18, s19, [%3, #8]\n"
" b 4f\n"
-" bti j\n" /* S3 */
+" "BTI_J"\n" /* S3 */
" ldp s16, s17, [%3]\n"
" ldr s18, [%3, #8]\n"
" b 3f\n"
-" bti j\n" /* S2 */
+" "BTI_J"\n" /* S2 */
" ldp s16, s17, [%3]\n"
" b 2f\n"
" nop\n"
-" bti j\n" /* S1 */
+" "BTI_J"\n" /* S1 */
" ldr s16, [%3]\n"
" b 1f\n"
" nop\n"
-" bti j\n" /* D4 */
+" "BTI_J"\n" /* D4 */
" ldp d16, d17, [%3]\n"
" ldp d18, d19, [%3, #16]\n"
" b 4f\n"
-" bti j\n" /* D3 */
+" "BTI_J"\n" /* D3 */
" ldp d16, d17, [%3]\n"
" ldr d18, [%3, #16]\n"
" b 3f\n"
-" bti j\n" /* D2 */
+" "BTI_J"\n" /* D2 */
" ldp d16, d17, [%3]\n"
" b 2f\n"
" nop\n"
-" bti j\n" /* D1 */
+" "BTI_J"\n" /* D1 */
" ldr d16, [%3]\n"
" b 1f\n"
" nop\n"
-" bti j\n" /* Q4 */
+" "BTI_J"\n" /* Q4 */
" ldp q16, q17, [%3]\n"
" ldp q18, q19, [%3, #32]\n"
" b 4f\n"
-" bti j\n" /* Q3 */
+" "BTI_J"\n" /* Q3 */
" ldp q16, q17, [%3]\n"
" ldr q18, [%3, #32]\n"
" b 3f\n"
-" bti j\n" /* Q2 */
+" "BTI_J"\n" /* Q2 */
" ldp q16, q17, [%3]\n"
" b 2f\n"
" nop\n"
-" bti j\n" /* Q1 */
+" "BTI_J"\n" /* Q1 */
" ldr q16, [%3]\n"
" b 1f\n"
"4: str q19, [%2, #48]\n"
diff --git a/src/aarch64/sysv.S b/src/aarch64/sysv.S
index 9f4188e0..90816752 100644
--- a/src/aarch64/sysv.S
+++ b/src/aarch64/sysv.S
@@ -64,6 +64,9 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
#define PTR_SIZE 8
#endif
+#define BTI_C hint #34
+#define BTI_J hint #36
+
.text
.align 4
@@ -84,7 +87,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
cfi_startproc
CNAME(ffi_call_SYSV):
- bti c
+ BTI_C
/* Sign the lr with x1 since that is where it will be stored */
SIGN_LR_WITH_REG(x1)
@@ -153,15 +156,15 @@ CNAME(ffi_call_SYSV):
and therefore we want to extend to 64 bits; these types
have two consecutive entries allocated for them. */
.align 4
-0: bti j /* VOID */
+0: BTI_J /* VOID */
b 99f
nop
nop
-1: bti j /* INT64 */
+1: BTI_J /* INT64 */
str x0, [x3]
b 99f
nop
-2: bti j /* INT128 */
+2: BTI_J /* INT128 */
stp x0, x1, [x3]
b 99f
nop
@@ -185,55 +188,55 @@ CNAME(ffi_call_SYSV):
b 99f
nop
nop
-8: bti j /* S4 */
+8: BTI_J /* S4 */
st4 { v0.s, v1.s, v2.s, v3.s }[0], [x3]
b 99f
nop
-9: bti j /* S3 */
+9: BTI_J /* S3 */
st3 { v0.s, v1.s, v2.s }[0], [x3]
b 99f
nop
-10: bti j /* S2 */
+10: BTI_J /* S2 */
stp s0, s1, [x3]
b 99f
nop
-11: bti j
+11: BTI_J
str s0, [x3] /* S1 */
b 99f
nop
-12: bti j /* D4 */
+12: BTI_J /* D4 */
st4 { v0.d, v1.d, v2.d, v3.d }[0], [x3]
b 99f
nop
-13: bti j /* D3 */
+13: BTI_J /* D3 */
st3 { v0.d, v1.d, v2.d }[0], [x3]
b 99f
nop
-14: bti j /* D2 */
+14: BTI_J /* D2 */
stp d0, d1, [x3]
b 99f
nop
-15: bti j /* D1 */
+15: BTI_J /* D1 */
str d0, [x3]
b 99f
nop
-16: bti j /* Q4 */
+16: BTI_J /* Q4 */
str q3, [x3, #48]
nop
nop
-17: bti j /* Q3 */
+17: BTI_J /* Q3 */
str q2, [x3, #32]
nop
nop
-18: bti j /* Q2 */
+18: BTI_J /* Q2 */
stp q0, q1, [x3]
b 99f
nop
-19: bti j /* Q1 */
+19: BTI_J /* Q1 */
str q0, [x3]
b 99f
nop
-20: bti j /* UINT8 */
+20: BTI_J /* UINT8 */
uxtb w0, w0
str x0, [x3]
nop
@@ -241,7 +244,7 @@ CNAME(ffi_call_SYSV):
nop
nop
nop
-22: bti j /* UINT16 */
+22: BTI_J /* UINT16 */
uxth w0, w0
str x0, [x3]
nop
@@ -249,7 +252,7 @@ CNAME(ffi_call_SYSV):
nop
nop
nop
-24: bti j /* UINT32 */
+24: BTI_J /* UINT32 */
mov w0, w0
str x0, [x3]
nop
@@ -257,7 +260,7 @@ CNAME(ffi_call_SYSV):
nop
nop
nop
-26: bti j /* SINT8 */
+26: BTI_J /* SINT8 */
sxtb x0, w0
str x0, [x3]
nop
@@ -265,7 +268,7 @@ CNAME(ffi_call_SYSV):
nop
nop
nop
-28: bti j /* SINT16 */
+28: BTI_J /* SINT16 */
sxth x0, w0
str x0, [x3]
nop
@@ -273,7 +276,7 @@ CNAME(ffi_call_SYSV):
nop
nop
nop
-30: bti j /* SINT32 */
+30: BTI_J /* SINT32 */
sxtw x0, w0
str x0, [x3]
nop
@@ -317,7 +320,7 @@ CNAME(ffi_call_SYSV):
.align 4
CNAME(ffi_closure_SYSV_V):
cfi_startproc
- bti c
+ BTI_C
SIGN_LR
stp x29, x30, [sp, #-ffi_closure_SYSV_FS]!
cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
@@ -342,7 +345,7 @@ CNAME(ffi_closure_SYSV_V):
.align 4
cfi_startproc
CNAME(ffi_closure_SYSV):
- bti c
+ BTI_C
SIGN_LR
stp x29, x30, [sp, #-ffi_closure_SYSV_FS]!
cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
@@ -378,15 +381,15 @@ L(do_closure):
/* Note that each table entry is 4 insns, and thus 16 bytes. */
.align 4
-0: bti j /* VOID */
+0: BTI_J /* VOID */
b 99f
nop
nop
-1: bti j /* INT64 */
+1: BTI_J /* INT64 */
ldr x0, [x3]
b 99f
nop
-2: bti j /* INT128 */
+2: BTI_J /* INT128 */
ldp x0, x1, [x3]
b 99f
nop
@@ -410,55 +413,55 @@ L(do_closure):
nop
nop
nop
-8: bti j /* S4 */
+8: BTI_J /* S4 */
ldr s3, [x3, #12]
nop
nop
-9: bti j /* S3 */
+9: BTI_J /* S3 */
ldr s2, [x3, #8]
nop
nop
-10: bti j /* S2 */
+10: BTI_J /* S2 */
ldp s0, s1, [x3]
b 99f
nop
-11: bti j /* S1 */
+11: BTI_J /* S1 */
ldr s0, [x3]
b 99f
nop
-12: bti j /* D4 */
+12: BTI_J /* D4 */
ldr d3, [x3, #24]
nop
nop
-13: bti j /* D3 */
+13: BTI_J /* D3 */
ldr d2, [x3, #16]
nop
nop
-14: bti j /* D2 */
+14: BTI_J /* D2 */
ldp d0, d1, [x3]
b 99f
nop
-15: bti j /* D1 */
+15: BTI_J /* D1 */
ldr d0, [x3]
b 99f
nop
-16: bti j /* Q4 */
+16: BTI_J /* Q4 */
ldr q3, [x3, #48]
nop
nop
-17: bti j /* Q3 */
+17: BTI_J /* Q3 */
ldr q2, [x3, #32]
nop
nop
-18: bti j /* Q2 */
+18: BTI_J /* Q2 */
ldp q0, q1, [x3]
b 99f
nop
-19: bti j /* Q1 */
+19: BTI_J /* Q1 */
ldr q0, [x3]
b 99f
nop
-20: bti j /* UINT8 */
+20: BTI_J /* UINT8 */
ldrb w0, [x3, #BE(7)]
b 99f
nop
@@ -466,7 +469,7 @@ L(do_closure):
nop
nop
nop
-22: bti j /* UINT16 */
+22: BTI_J /* UINT16 */
ldrh w0, [x3, #BE(6)]
b 99f
nop
@@ -474,7 +477,7 @@ L(do_closure):
nop
nop
nop
-24: bti j /* UINT32 */
+24: BTI_J /* UINT32 */
ldr w0, [x3, #BE(4)]
b 99f
nop
@@ -482,7 +485,7 @@ L(do_closure):
nop
nop
nop
-26: bti j /* SINT8 */
+26: BTI_J /* SINT8 */
ldrsb x0, [x3, #BE(7)]
b 99f
nop
@@ -490,7 +493,7 @@ L(do_closure):
nop
nop
nop
-28: bti j /* SINT16 */
+28: BTI_J /* SINT16 */
ldrsh x0, [x3, #BE(6)]
b 99f
nop
@@ -498,7 +501,7 @@ L(do_closure):
nop
nop
nop
-30: bti j /* SINT32 */
+30: BTI_J /* SINT32 */
ldrsw x0, [x3, #BE(4)]
nop
nop
@@ -614,7 +617,7 @@ CNAME(ffi_closure_trampoline_table_page):
.align 4
CNAME(ffi_go_closure_SYSV_V):
cfi_startproc
- bti c
+ BTI_C
stp x29, x30, [sp, #-ffi_closure_SYSV_FS]!
cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
cfi_rel_offset (x29, 0)
@@ -638,7 +641,7 @@ CNAME(ffi_go_closure_SYSV_V):
.align 4
cfi_startproc
CNAME(ffi_go_closure_SYSV):
- bti c
+ BTI_C
stp x29, x30, [sp, #-ffi_closure_SYSV_FS]!
cfi_adjust_cfa_offset (ffi_closure_SYSV_FS)
cfi_rel_offset (x29, 0)

89
830.patch Normal file
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@ -0,0 +1,89 @@
From 38d1c9d783b2c3b2b271e66a712962ffbbf7b9a5 Mon Sep 17 00:00:00 2001
From: Bill Roberts <bill.roberts@arm.com>
Date: Thu, 7 Mar 2024 13:07:29 -0600
Subject: [PATCH 1/3] bti: add identifier to ffi_closure_SYSV_V_alt
This was missing BTI_C identifier.
Old Code:
ffi_closure_SYSV_V_alt:
0000fffff7f70500: ldr x17, [sp, #8]
Signed-off-by: Bill Roberts <bill.roberts@arm.com>
---
src/aarch64/sysv.S | 2 ++
1 file changed, 2 insertions(+)
diff --git a/src/aarch64/sysv.S b/src/aarch64/sysv.S
index fdd0e8b7..ba49aa13 100644
--- a/src/aarch64/sysv.S
+++ b/src/aarch64/sysv.S
@@ -527,6 +527,7 @@ L(do_closure):
#if defined(FFI_EXEC_STATIC_TRAMP)
.align 4
CNAME(ffi_closure_SYSV_V_alt):
+ BTI_C
/* See the comments above trampoline_code_table. */
ldr x17, [sp, #8] /* Load closure in x17 */
add sp, sp, #16 /* Restore the stack */
@@ -541,6 +542,7 @@ CNAME(ffi_closure_SYSV_V_alt):
.align 4
CNAME(ffi_closure_SYSV_alt):
+ BTI_C
/* See the comments above trampoline_code_table. */
ldr x17, [sp, #8] /* Load closure in x17 */
add sp, sp, #16 /* Restore the stack */
From da2376df7618356e9ab792a8a3cc17ba02a3108a Mon Sep 17 00:00:00 2001
From: Bill Roberts <bill.roberts@arm.com>
Date: Thu, 7 Mar 2024 13:07:34 -0600
Subject: [PATCH 2/3] testsuite: fix whitespace in Makefile.am
Signed-off-by: Bill Roberts <bill.roberts@arm.com>
---
testsuite/Makefile.am | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/testsuite/Makefile.am b/testsuite/Makefile.am
index d286cf7f..6ba98e12 100644
--- a/testsuite/Makefile.am
+++ b/testsuite/Makefile.am
@@ -8,7 +8,7 @@ CLEANFILES = *.exe core* *.log *.sum
EXTRA_DIST = config/default.exp emscripten/build.sh emscripten/conftest.py \
emscripten/node-tests.sh emscripten/test.html emscripten/test_libffi.py \
- emscripten/build-tests.sh lib/libffi.exp lib/target-libpath.exp \
+ emscripten/build-tests.sh lib/libffi.exp lib/target-libpath.exp \
lib/wrapper.exp libffi.bhaible/Makefile libffi.bhaible/README \
libffi.bhaible/alignof.h libffi.bhaible/bhaible.exp libffi.bhaible/test-call.c \
libffi.bhaible/test-callback.c libffi.bhaible/testcases.c libffi.call/align_mixed.c \
From 243fc9e2a1ebcf60a90652ac1e0bc82a945760a5 Mon Sep 17 00:00:00 2001
From: Bill Roberts <bill.roberts@arm.com>
Date: Thu, 7 Mar 2024 13:03:13 -0600
Subject: [PATCH 3/3] aarch64: correct comment describing BTI
The comment is incorrect, BTI is enabled per mapping via mprotect with
PROT_BTI flag set, not per-process. When the loader loads the library,
if the GNU Notes section is missing this, PROT_BTI will not be enabled
for that mapping, but is independent of other mappings.
Signed-off-by: Bill Roberts <bill.roberts@arm.com>
---
src/aarch64/sysv.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/aarch64/sysv.S b/src/aarch64/sysv.S
index ba49aa13..60cfa505 100644
--- a/src/aarch64/sysv.S
+++ b/src/aarch64/sysv.S
@@ -68,7 +68,7 @@ SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. */
#define BTI_J hint #36
/*
* The ELF Notes section needs to indicate if BTI is supported, as the first ELF loaded that doesn't
- * declare this support disables it for the whole process.
+ * declare this support disables it for memory region containing the loaded library.
*/
# define GNU_PROPERTY_AARCH64_BTI (1 << 0) /* Has Branch Target Identification */
.text

BIN
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libffi-3.4.6.tar.gz (Stored with Git LFS) Normal file

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@ -1,3 +1,21 @@
-------------------------------------------------------------------
Tue Mar 19 15:22:24 UTC 2024 - Guillaume GARDET <guillaume.gardet@opensuse.org>
- Add patches to fix BTI on aarch64:
* 830.patch
- Update to 3.4.6:
* Fix long double regression on mips64 and alpha.
- Update to 3.4.5:
* Add support for wasm32.
* Add support for aarch64 branch target identification (bti).
* Add support for ARCv3: ARC32 & ARC64.
* Add support for HPPA64, and many HPPA fixes.
* Add support for Haikuos on PowerPC.
* Fixes for AIX, loongson, MIPS, power, sparc64, and x86 Darwin.
- Drop upstreamed patches:
* 808.patch
* 810.patch
------------------------------------------------------------------- -------------------------------------------------------------------
Wed Dec 6 09:11:47 UTC 2023 - Guillaume GARDET <guillaume.gardet@opensuse.org> Wed Dec 6 09:11:47 UTC 2023 - Guillaume GARDET <guillaume.gardet@opensuse.org>

View File

@ -1,7 +1,7 @@
# #
# spec file for package libffi # spec file for package libffi
# #
# Copyright (c) 2023 SUSE LLC # Copyright (c) 2024 SUSE LLC
# #
# All modifications and additions to the file contributed by third parties # All modifications and additions to the file contributed by third parties
# remain the property of their copyright owners, unless otherwise agreed # remain the property of their copyright owners, unless otherwise agreed
@ -18,7 +18,7 @@
%define libffi_sover 8 %define libffi_sover 8
Name: libffi Name: libffi
Version: 3.4.4 Version: 3.4.6
Release: 0 Release: 0
Summary: Foreign Function Interface Library Summary: Foreign Function Interface Library
License: MIT License: MIT
@ -26,9 +26,8 @@ Group: Development/Languages/C and C++
URL: https://sourceware.org/libffi/ URL: https://sourceware.org/libffi/
Source: https://github.com/libffi/libffi/releases/download/v%{version}/libffi-%{version}.tar.gz Source: https://github.com/libffi/libffi/releases/download/v%{version}/libffi-%{version}.tar.gz
Source99: baselibs.conf Source99: baselibs.conf
# Fix BTI for aarch64 with PR 808 and 810 # Fix BTI for aarch64 with PR 830
Patch1: https://github.com/libffi/libffi/pull/808.patch Patch1: https://github.com/libffi/libffi/pull/830.patch
Patch2: https://github.com/libffi/libffi/pull/810.patch
# for make check # for make check
BuildRequires: dejagnu BuildRequires: dejagnu
BuildRequires: expect BuildRequires: expect