forked from pool/openssl-3
Accepting request 1131607 from home:Guillaume_G:PAC_BTI
- Add patch to fix BTI enablement on aarch64: * openssl-Enable-BTI-feature-for-md5-on-aarch64.patch OBS-URL: https://build.opensuse.org/request/show/1131607 OBS-URL: https://build.opensuse.org/package/show/security:tls/openssl-3?expand=0&rev=82
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@ -1,3 +1,9 @@
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-------------------------------------------------------------------
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Thu Dec 7 09:54:17 UTC 2023 - Guillaume GARDET <guillaume.gardet@opensuse.org>
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- Add patch to fix BTI enablement on aarch64:
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* openssl-Enable-BTI-feature-for-md5-on-aarch64.patch
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-------------------------------------------------------------------
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Thu Nov 23 16:07:51 UTC 2023 - Otto Hollmann <otto.hollmann@suse.com>
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@ -53,6 +53,8 @@ Patch9: openssl-Add-FIPS_mode-compatibility-macro.patch
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Patch10: openssl-Add-Kernel-FIPS-mode-flag-support.patch
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# PATCH-FIX-UPSTREAM Fix test/recipes/01-test_symbol_presence.t
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Patch11: openssl-Fix_test_symbol_presence.patch
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# PATCH-FIX-UPSTREAM https://github.com/openssl/openssl/pull/22971
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Patch12: openssl-Enable-BTI-feature-for-md5-on-aarch64.patch
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BuildRequires: pkgconfig
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BuildRequires: pkgconfig(zlib)
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Requires: libopenssl3 = %{version}-%{release}
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28
openssl-Enable-BTI-feature-for-md5-on-aarch64.patch
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28
openssl-Enable-BTI-feature-for-md5-on-aarch64.patch
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@ -0,0 +1,28 @@
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From d2bfec6e464aeb247a2d6853668d4e473f19e15f Mon Sep 17 00:00:00 2001
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From: "fangming.fang" <fangming.fang@arm.com>
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Date: Thu, 7 Dec 2023 06:17:51 +0000
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Subject: [PATCH] Enable BTI feature for md5 on aarch64
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Fixes: #22959
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---
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crypto/md5/asm/md5-aarch64.pl | 3 +++
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1 file changed, 3 insertions(+)
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diff --git a/crypto/md5/asm/md5-aarch64.pl b/crypto/md5/asm/md5-aarch64.pl
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index 3200a0fa9bff0..5a8608069691d 100755
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--- a/crypto/md5/asm/md5-aarch64.pl
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+++ b/crypto/md5/asm/md5-aarch64.pl
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@@ -28,10 +28,13 @@
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*STDOUT=*OUT;
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$code .= <<EOF;
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+#include "arm_arch.h"
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+
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.text
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.globl ossl_md5_block_asm_data_order
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.type ossl_md5_block_asm_data_order,\@function
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ossl_md5_block_asm_data_order:
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+ AARCH64_VALID_CALL_TARGET
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// Save all callee-saved registers
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stp x19,x20,[sp,#-80]!
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stp x21,x22,[sp,#16]
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