Sync from SUSE:SLFO:Main binutils revision 89955e7678b37d5ad323a72cc03ade53

This commit is contained in:
Adrian Schröter 2024-09-13 16:03:27 +02:00
parent c30d02862d
commit 33ea093187
11 changed files with 132 additions and 137 deletions

BIN
binutils-2.42-branch.diff.gz (Stored with Git LFS)

Binary file not shown.

BIN
binutils-2.42.tar.bz2 (Stored with Git LFS)

Binary file not shown.

View File

@ -1,16 +0,0 @@
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEOiS8Ho+0CfqfFDcYE/zvid2ePE8FAmW3wiYACgkQE/zvid2e
PE+HQBAAgC3yZJvJBx/0EtNESazNRpUG8G4pnd0505QYiibf+5243xXusDySXVu3
iBt2UltDPauPu6eIUC7qY0xaZHhPuxqPHp6oSrB73iHZ7ovTdbZUX2060Ro8KXha
xN6+SPBHQGxP8XZw+ezexYNpwHBGM8CUos7UeeLpskuSBRGQC4bEhCOR8wuvU1w9
gHTFuOY5zKgzzNMr1fPp/tRqUqZr8A7R1HN6tAs+4N2QWLk9Z/oF7h7Rkrzqe8gY
vmaakulfBTiqNIZJyTQhbhPiWrtLdElKyohBa/enqtTrktXoX/gwX21+LMqU+Oh3
qE7CicjEZKGK/e8gl0BjcwgMeuUYYpZRUI1+A++YAu+YPSzLQL9iPy1FUovrYhHO
Fr/qV156MtnhkoaI7RVDLKl2s3CP451yjHSDcAsB51wq+QophC3z6yoTXKuKW8h6
v2yW5ZaG5GfiPmRw+E46qsZWeb2pOUaGVU8ovaYWfLjrZ20WFZwZKLn55ZwZ35eW
g3RSff4f0lqr8x7jWDkf+KQMC2K0O6Sl0sgFoFE6PMPFcGe4r6oSIekNygaFgxBv
DrL0IA8y1prpmpnJrGbIg1+ciguAJKEBfcV9pNyq1IAHWu3aOMbWKb5pF0ukb0PY
OueuuH06uaBa7vgZxvbTiw0j5+PuTlGHa3Bsf4rlkChK2N/6deQ=
=5bYR
-----END PGP SIGNATURE-----

BIN
binutils-2.43-branch.diff.gz (Stored with Git LFS) Normal file

Binary file not shown.

BIN
binutils-2.43.tar.bz2 (Stored with Git LFS) Normal file

Binary file not shown.

16
binutils-2.43.tar.bz2.sig Normal file
View File

@ -0,0 +1,16 @@
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEOiS8Ho+0CfqfFDcYE/zvid2ePE8FAmaviv8ACgkQE/zvid2e
PE9C2hAAw9RCvIe7c6zdMBslwnHm5lJE4P8OLgfvQhW1LyNMM7q6UtJC0oG1mCAk
qpfDkp62XXXLu8QUVvuGhLOrAC7PkkwRs+RKaidOmQ1DDaFsh6h1EilbRbeXhwT6
+GgL9gmoflWQ+/VTi8ETc6F0kxfbOFLDgWQf8LZ66g9Z5RzoUaRfcktljjPpmgvh
kp2V/8QsY6rTtJDpTfSp5ysvvfkuh0DQBN/aOlnjcbupaj2p2aBrs0PiAmtiNfGZ
616FCFytqNYX8KxVV3OZcTOCKARcFxXc/4q1za+0musaqLHGlw8h27jTEU51lQJy
gemDWIJbVoth/jK4/pIl7rsiLte136qj6JybsAh3LLM7JTcwf9rha0DyU0nBmSyt
4PfzOsoSRjfIBTTPlmS7L2thY8+Y0sYPcIf8lj8ue9YZyYYSix/8KUm/0vvmwJr8
XUiw0sUpGcSUTFjqhNxcjqORSQBWb9kjRod+PdU9LEFE4cp3mexkzjIgEWDkRjqP
sTdstNT1A5LiX5XhcMKVze9D28y2XQRxkbvbBbm4nt4cIBvk1QtsZZH4bR5ABgyF
q8kp0FpBrbvOBTDQsuAuvL9lOg5unngZLAOeogxsOJblirzX6cPku5NDQgY7GYUP
SIEOJaMU5OoI6NU9iVt1LBZZaMO6+16PTNQ2MArgI0g2B1HNC3U=
=vvKA
-----END PGP SIGNATURE-----

View File

@ -26,10 +26,10 @@ of missing support in ld.so.
proper predicate to guard themself)
Index: binutils-2.42/bfd/elf64-x86-64.c
Index: binutils-2.43/bfd/elf64-x86-64.c
===================================================================
--- binutils-2.42.orig/bfd/elf64-x86-64.c 2024-01-30 16:59:42.442361796 +0100
+++ binutils-2.42/bfd/elf64-x86-64.c 2024-01-30 17:54:25.162977883 +0100
--- binutils-2.43.orig/bfd/elf64-x86-64.c 2024-08-06 16:48:34.104745566 +0200
+++ binutils-2.43/bfd/elf64-x86-64.c 2024-08-06 16:48:36.554787135 +0200
@@ -48,127 +48,127 @@ static reloc_howto_type x86_64_elf_howto
bfd_elf_generic_reloc, "R_X86_64_NONE", false, 0, 0x00000000,
false),
@ -199,7 +199,7 @@ Index: binutils-2.42/bfd/elf64-x86-64.c
true),
HOWTO(R_X86_64_CODE_4_GOTPCRELX, 0, 4, 32, true, 0, complain_overflow_signed,
bfd_elf_generic_reloc, "R_X86_64_CODE_4_GOTPCRELX", false, 0, 0xffffffff,
@@ -198,7 +198,7 @@ static reloc_howto_type x86_64_elf_howto
@@ -216,7 +216,7 @@ static reloc_howto_type x86_64_elf_howto
/* Use complain_overflow_bitfield on R_X86_64_32 for x32. */
HOWTO(R_X86_64_32, 0, 4, 32, false, 0, complain_overflow_bitfield,
@ -208,9 +208,9 @@ Index: binutils-2.42/bfd/elf64-x86-64.c
false)
};
Index: binutils-2.42/gas/testsuite/gas/i386/rela.d
Index: binutils-2.43/gas/testsuite/gas/i386/rela.d
===================================================================
--- binutils-2.42.orig/gas/testsuite/gas/i386/rela.d 2024-01-29 01:00:00.000000000 +0100
--- binutils-2.43.orig/gas/testsuite/gas/i386/rela.d 2024-08-06 16:48:34.104745566 +0200
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,13 +0,0 @@
-#name: x86-64 rela relocs w/ non-zero relocated fields
@ -226,9 +226,9 @@ Index: binutils-2.42/gas/testsuite/gas/i386/rela.d
-
-Contents of section .data:
- 0+0 11 ?11 ?11 ?11 22 ?22 ?22 ?22 33 ?33 ?33 ?33 44 ?44 ?44 ?44 .*
Index: binutils-2.42/gas/testsuite/gas/i386/rela.s
Index: binutils-2.43/gas/testsuite/gas/i386/rela.s
===================================================================
--- binutils-2.42.orig/gas/testsuite/gas/i386/rela.s 2024-01-29 01:00:00.000000000 +0100
--- binutils-2.43.orig/gas/testsuite/gas/i386/rela.s 2024-08-06 16:48:34.104745566 +0200
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,14 +0,0 @@
-# Note: This file is also used by an ld test case.
@ -245,9 +245,9 @@ Index: binutils-2.42/gas/testsuite/gas/i386/rela.s
-
- .reloc l, BFD_RELOC_64, q
- .reloc q, BFD_RELOC_32, l
Index: binutils-2.42/ld/testsuite/ld-x86-64/rela.d
Index: binutils-2.43/ld/testsuite/ld-x86-64/rela.d
===================================================================
--- binutils-2.42.orig/ld/testsuite/ld-x86-64/rela.d 2024-01-29 01:00:00.000000000 +0100
--- binutils-2.43.orig/ld/testsuite/ld-x86-64/rela.d 2024-08-06 16:48:34.104745566 +0200
+++ /dev/null 1970-01-01 00:00:00.000000000 +0000
@@ -1,10 +0,0 @@
-#name: x86-64 rela relocs w/ non-zero relocated fields
@ -260,11 +260,11 @@ Index: binutils-2.42/ld/testsuite/ld-x86-64/rela.d
-
-Contents of section .data:
- *[0-9a-f]*0 .8 ?.. ?.. ?.. 00 ?00 ?00 ?00 .0 ?.. ?.. ?.. 44 ?44 ?44 ?44 .*
Index: binutils-2.42/ld/testsuite/ld-x86-64/x86-64.exp
Index: binutils-2.43/ld/testsuite/ld-x86-64/x86-64.exp
===================================================================
--- binutils-2.42.orig/ld/testsuite/ld-x86-64/x86-64.exp 2024-01-30 16:57:58.487327524 +0100
+++ binutils-2.42/ld/testsuite/ld-x86-64/x86-64.exp 2024-01-30 17:55:13.480432003 +0100
@@ -291,7 +291,6 @@ run_dump_test "apic"
--- binutils-2.43.orig/ld/testsuite/ld-x86-64/x86-64.exp 2024-08-06 16:48:34.104745566 +0200
+++ binutils-2.43/ld/testsuite/ld-x86-64/x86-64.exp 2024-08-06 16:48:36.554787135 +0200
@@ -309,7 +309,6 @@ run_dump_test "apic"
run_dump_test "pcrel8"
run_dump_test "pcrel16"
run_dump_test "pcrel16-2"
@ -272,7 +272,7 @@ Index: binutils-2.42/ld/testsuite/ld-x86-64/x86-64.exp
run_dump_test "tlsgd2"
run_dump_test "tlsgd3"
run_dump_test "tlsgd12"
@@ -506,10 +505,10 @@ run_dump_test "pr27491-1c"
@@ -524,10 +523,10 @@ run_dump_test "pr27491-1c"
run_dump_test "pr27491-2"
run_dump_test "pr27491-3"
run_dump_test "pr27491-4"
@ -287,11 +287,11 @@ Index: binutils-2.42/ld/testsuite/ld-x86-64/x86-64.exp
run_dump_test "pr30787"
run_dump_test "pr31047"
run_dump_test "pr31047-x32"
Index: binutils-2.42/binutils/testsuite/lib/binutils-common.exp
Index: binutils-2.43/binutils/testsuite/lib/binutils-common.exp
===================================================================
--- binutils-2.42.orig/binutils/testsuite/lib/binutils-common.exp 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/binutils/testsuite/lib/binutils-common.exp 2024-01-30 17:54:25.166311271 +0100
@@ -449,6 +449,8 @@ proc supports_persistent_section {} {
--- binutils-2.43.orig/binutils/testsuite/lib/binutils-common.exp 2024-08-06 16:48:34.104745566 +0200
+++ binutils-2.43/binutils/testsuite/lib/binutils-common.exp 2024-08-06 16:48:36.554787135 +0200
@@ -470,6 +470,8 @@ proc supports_persistent_section {} {
# Whether a target support DT_RELR sections.
proc supports_dt_relr {} {
@ -299,11 +299,11 @@ Index: binutils-2.42/binutils/testsuite/lib/binutils-common.exp
+ return 0
if { ([istarget x86_64-*-*]
|| [istarget i?86-*-*]
|| [istarget powerpc64*-*-*])
Index: binutils-2.42/ld/emulparams/dt-relr.sh
|| [istarget powerpc64*-*-*]
Index: binutils-2.43/ld/emulparams/dt-relr.sh
===================================================================
--- binutils-2.42.orig/ld/emulparams/dt-relr.sh 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/ld/emulparams/dt-relr.sh 2024-01-30 17:54:25.166311271 +0100
--- binutils-2.43.orig/ld/emulparams/dt-relr.sh 2024-08-06 16:48:34.104745566 +0200
+++ binutils-2.43/ld/emulparams/dt-relr.sh 2024-08-06 16:48:36.554787135 +0200
@@ -1,3 +1,8 @@
+if false; then
+ # on old codestreams we don't have the DT_RELR support in the dynamic
@ -319,10 +319,10 @@ Index: binutils-2.42/ld/emulparams/dt-relr.sh
PARSE_AND_LIST_ARGS_CASE_Z="$PARSE_AND_LIST_ARGS_CASE_Z $PARSE_AND_LIST_ARGS_CASE_Z_PACK_RELATIVE_RELOCS"
+
+fi
Index: binutils-2.42/ld/testsuite/ld-i386/i386.exp
Index: binutils-2.43/ld/testsuite/ld-i386/i386.exp
===================================================================
--- binutils-2.42.orig/ld/testsuite/ld-i386/i386.exp 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/ld/testsuite/ld-i386/i386.exp 2024-01-30 17:54:25.166311271 +0100
--- binutils-2.43.orig/ld/testsuite/ld-i386/i386.exp 2024-08-06 16:48:34.104745566 +0200
+++ binutils-2.43/ld/testsuite/ld-i386/i386.exp 2024-08-06 16:48:36.554787135 +0200
@@ -507,8 +507,8 @@ run_dump_test "pr27491-1c"
run_dump_test "pr27491-2"
run_dump_test "pr27491-3"
@ -334,10 +334,10 @@ Index: binutils-2.42/ld/testsuite/ld-i386/i386.exp
run_dump_test "pr28870"
run_dump_test "pr28894"
run_dump_test "pr30787"
Index: binutils-2.42/ld/testsuite/ld-powerpc/powerpc.exp
Index: binutils-2.43/ld/testsuite/ld-powerpc/powerpc.exp
===================================================================
--- binutils-2.42.orig/ld/testsuite/ld-powerpc/powerpc.exp 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/ld/testsuite/ld-powerpc/powerpc.exp 2024-01-30 17:54:25.166311271 +0100
--- binutils-2.43.orig/ld/testsuite/ld-powerpc/powerpc.exp 2024-08-06 16:48:34.104745566 +0200
+++ binutils-2.43/ld/testsuite/ld-powerpc/powerpc.exp 2024-08-06 16:48:36.554787135 +0200
@@ -378,14 +378,14 @@ set ppc64elftests {
"-a64" {abs-reloc.s}
{{objdump {-sdr} abs-shared.d}
@ -361,11 +361,11 @@ Index: binutils-2.42/ld/testsuite/ld-powerpc/powerpc.exp
}
set ppceabitests {
Index: binutils-2.42/gas/testsuite/gas/i386/x86-64.exp
Index: binutils-2.43/gas/testsuite/gas/i386/x86-64.exp
===================================================================
--- binutils-2.42.orig/gas/testsuite/gas/i386/x86-64.exp 2024-01-29 01:00:00.000000000 +0100
+++ binutils-2.42/gas/testsuite/gas/i386/x86-64.exp 2024-01-30 17:54:25.166311271 +0100
@@ -628,7 +628,6 @@ if [is_elf_format] then {
--- binutils-2.43.orig/gas/testsuite/gas/i386/x86-64.exp 2024-08-06 16:48:34.104745566 +0200
+++ binutils-2.43/gas/testsuite/gas/i386/x86-64.exp 2024-08-06 16:48:36.554787135 +0200
@@ -653,7 +653,6 @@ if [is_elf_format] then {
run_list_test "reloc64" "--defsym _bad_=1"
run_list_test "x86-64-inval-tls"
run_dump_test "mixed-mode-reloc64"

View File

@ -1,3 +1,64 @@
-------------------------------------------------------------------
Wed Aug 28 13:18:28 UTC 2024 - Michael Matz <matz@suse.com>
- Update to current 2.43.1 branch [PED-10474]:
* PR32109 - fuzzing problem
* PR32083 - LTO vs overridden common symbols
* PR32067 - crash with LTO-plugin and --oformat=binary
* PR31956 - LTO vs wrapper symbols
* riscv - add Zimop and Zcmop extensions
- Adjusted binutils-2.43-branch.diff.gz.
-------------------------------------------------------------------
Tue Aug 6 14:09:24 UTC 2024 - Michael Matz <matz@suse.com>
- Update to version 2.43:
* new .base64 pseudo-op, allowing base64 encoded data as strings
* Intel APX: add support for CFCMOV, CCMP, CTEST, zero-upper, NF
(APX_F now fully supported)
* x86 Intel syntax now warns about more mnemonic suffixes
* macros and .irp/.irpc/.rept bodies can use \+ to get at number
of times the macro/body was executed
* aarch64: support 'armv9.5-a' for -march, add support for LUT
and LUT2
* s390: base register operand in D(X,B) and D(L,B) can now be
omitted (ala 'D(X,)'); warn when register type doesn't match
operand type (use option
'warn-regtype-mismatch=[strict|relaxed|no]' to adjust)
* riscv: support various extensions: Zacas, Zcmp, Zfbfmin,
Zvfbfmin, Zvfbfwma, Smcsrind/Sscsrind, XCvMem, XCvBi, XCvElw,
XSfCease, all at version 1.0;
remove support for assembly of privileged spec 1.9.1 (linking
support remains)
* arm: remove support for some old co-processors: Maverick and FPA
* mips: '--trap' now causes either trap or breakpoint instructions
to be emitted as per current ISA, instead of always using trap
insn and failing when current ISA was incompatible with that
* LoongArch: accept .option pseudo-op for fine-grained control
of assembly code options; add support for DT_RELR
* readelf: now displays RELR relocations in full detail;
add -j/--display-section to show just those section(s) content
according to their type
* objdump/readelf now dump also .eh_frame_hdr (when present) when
dumping .eh_frame
* gprofng: add event types for AMD Zen3/Zen4 and Intel Ice Lake
processors; add minimal support for riscv
* linker:
- put .got and .got.plt into relro segment
- add -z isa-level-report=[none|all|needed|used] to the x86 ELF
linker to report needed and used x86-64 ISA levels
- add --rosegment option which changes the -z separate-code
option so that only one read-only segment is created (instead
of two)
- add --section-ordering-file <FILE> option to add extra
mapping of input sections to output sections
- add -plugin-save-temps to store plugin intermediate files
permanently
- Removed binutils-2.42.tar.bz2, binutils-2.42-branch.diff.gz.
- Added binutils-2.43.tar.bz2, binutils-2.43-branch.diff.gz.
- Removed upstream patch riscv-no-relax.patch.
- Rebased ld-relro.diff and binutils-revert-rela.diff.
-------------------------------------------------------------------
Thu Jun 13 08:35:38 UTC 2024 - Andreas Schwab <schwab@suse.de>

View File

@ -64,7 +64,7 @@ BuildRequires: zlib-devel
%if %{suse_version} > 1500
BuildRequires: libzstd-devel
%endif
Version: 2.42
Version: 2.43
Release: 0
# disable libalternatives for now until it's changed to not
@ -131,7 +131,7 @@ Source: binutils-%{version}.tar.bz2
Source2: binutils-%{version}.tar.bz2.sig
Source3: binutils.keyring
Source4: baselibs.conf
Patch1: binutils-2.42-branch.diff.gz
Patch1: binutils-2.43-branch.diff.gz
Patch3: binutils-skip-rpaths.patch
Patch4: s390-biarch.diff
Patch5: x86-64-biarch.patch
@ -153,7 +153,6 @@ Patch42: binutils-compat-old-behaviour.diff
Patch43: binutils-revert-hlasm-insns.diff
Patch44: binutils-revert-rela.diff
Patch60: binutils-disable-code-arch-error.diff
Patch61: riscv-no-relax.patch
Patch90: cross-avr-nesc-as.patch
Patch92: cross-avr-omit_section_dynsym.patch
Patch93: cross-avr-size.patch
@ -279,7 +278,6 @@ cp ld/ldgram.y ld/ldgram.y.orig
%patch -P 44 -p1
%endif
%patch -P 60 -p1
%patch -P 61 -p1
%if "%{TARGET}" == "avr"
cp gas/config/tc-avr.h gas/config/tc-avr-nesc.h
%patch -P 90

View File

@ -1,8 +1,8 @@
Index: ld/lexsup.c
===================================================================
--- ld/lexsup.c.orig 2014-10-14 17:43:07.000000000 +0200
+++ ld/lexsup.c 2014-10-14 17:43:26.000000000 +0200
@@ -623,6 +623,9 @@ parse_args (unsigned argc, char **argv)
--- ld/lexsup.c.orig 2024-08-04 01:00:00.000000000 +0200
+++ ld/lexsup.c 2024-08-06 16:02:35.554864901 +0200
@@ -772,6 +772,9 @@ parse_args (unsigned argc, char **argv)
}
}
@ -14,10 +14,10 @@ Index: ld/lexsup.c
{
Index: ld/testsuite/config/default.exp
===================================================================
--- ld/testsuite/config/default.exp.orig 2014-10-14 17:43:07.000000000 +0200
+++ ld/testsuite/config/default.exp 2014-10-14 17:44:58.000000000 +0200
@@ -22,7 +22,7 @@
#
--- ld/testsuite/config/default.exp.orig 2024-08-04 01:00:00.000000000 +0200
+++ ld/testsuite/config/default.exp 2024-08-06 16:05:13.860859897 +0200
@@ -39,7 +39,7 @@ if [info exists env(LD_UNDER_TEST)] {
}
if ![info exists ld] then {
- set ld [findfile $base_dir/ld-new $base_dir/ld-new [transform ld]]
@ -25,16 +25,16 @@ Index: ld/testsuite/config/default.exp
}
if ![info exists as] then {
@@ -70,7 +70,7 @@ if {[info exists ld_testsuite_bindir]} {
catch "exec ln -s ld tmpdir/ld/collect-ld" status
catch "exec ln -s ../../../gas/as-new tmpdir/ld/as" status
@@ -92,7 +92,7 @@ if {[info exists ld_testsuite_bindir]} {
}
catch "exec ln -s ld tmpdir/ld/collect-ld" status
catch "exec ln -s ../../../gas/as-new tmpdir/ld/as" status
- set gcc_B_opt "-B[pwd]/tmpdir/ld/"
+ set gcc_B_opt "-B[pwd]/tmpdir/ld/ -Wl,-z,norelro"
}
# load the linker path
@@ -272,7 +272,7 @@ if ![info exists READELFFLAGS] then {
@@ -343,7 +343,7 @@ if ![info exists ELFEDIT] then {
}
if ![info exists LD] then {
@ -45,9 +45,9 @@ Index: ld/testsuite/config/default.exp
if ![info exists LDFLAGS] then {
Index: ld/testsuite/ld-bootstrap/bootstrap.exp
===================================================================
--- ld/testsuite/ld-bootstrap/bootstrap.exp.orig 2014-10-14 17:43:07.000000000 +0200
+++ ld/testsuite/ld-bootstrap/bootstrap.exp 2014-10-14 17:43:26.000000000 +0200
@@ -106,7 +106,12 @@ foreach flags $test_flags {
--- ld/testsuite/ld-bootstrap/bootstrap.exp.orig 2024-08-04 01:00:00.000000000 +0200
+++ ld/testsuite/ld-bootstrap/bootstrap.exp 2024-08-06 16:02:35.554864901 +0200
@@ -112,7 +112,12 @@ foreach flags $test_flags {
# This test can only be run if we have the ld build directory,
# since we need the object files.

View File

@ -1,64 +0,0 @@
From af514e5f6d1d0233a251a3ae17f7cb8d9ba8e36b Mon Sep 17 00:00:00 2001
From: Nelson Chu <nelson@rivosinc.com>
Date: Mon, 29 Jan 2024 21:17:41 +0800
Subject: [PATCH] RISC-V: Don't generate branch/jump relocation if symbol is
local when no-relax.
Refer to commit, dff565fcca8137954d6ad571ef39f6aec5c0429c. Theoretically,
assembler don't need to generate the pc-relative relocation and the refered
local .L symbol when relaxation is disabled. The above commit improved the
pcrel_hi/pcrel_lo relocations, and this commit improves branch and jump
relocations.
Passed the gcc/binutils regressions of riscv-gnu-toolchain.
gas/
* config/tc-riscv.c (md_apply_fix): Raise fixP->fx_done for all
branch and jump relocations when -mno-relax.
---
gas/config/tc-riscv.c | 8 ++++++++
1 file changed, 8 insertions(+)
diff --git a/gas/config/tc-riscv.c b/gas/config/tc-riscv.c
index a4161420128..cbead954f09 100644
--- a/gas/config/tc-riscv.c
+++ b/gas/config/tc-riscv.c
@@ -4390,6 +4390,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
bfd_vma target = S_GET_VALUE (fixP->fx_addsy) + *valP;
bfd_vma delta = target - md_pcrel_from (fixP);
bfd_putl32 (bfd_getl32 (buf) | ENCODE_JTYPE_IMM (delta), buf);
+ if (!riscv_opts.relax && S_IS_LOCAL (fixP->fx_addsy))
+ fixP->fx_done = 1;
}
break;
@@ -4400,6 +4402,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
bfd_vma target = S_GET_VALUE (fixP->fx_addsy) + *valP;
bfd_vma delta = target - md_pcrel_from (fixP);
bfd_putl32 (bfd_getl32 (buf) | ENCODE_BTYPE_IMM (delta), buf);
+ if (!riscv_opts.relax && S_IS_LOCAL (fixP->fx_addsy))
+ fixP->fx_done = 1;
}
break;
@@ -4410,6 +4414,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
bfd_vma target = S_GET_VALUE (fixP->fx_addsy) + *valP;
bfd_vma delta = target - md_pcrel_from (fixP);
bfd_putl16 (bfd_getl16 (buf) | ENCODE_CBTYPE_IMM (delta), buf);
+ if (!riscv_opts.relax && S_IS_LOCAL (fixP->fx_addsy))
+ fixP->fx_done = 1;
}
break;
@@ -4420,6 +4426,8 @@ md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
bfd_vma target = S_GET_VALUE (fixP->fx_addsy) + *valP;
bfd_vma delta = target - md_pcrel_from (fixP);
bfd_putl16 (bfd_getl16 (buf) | ENCODE_CJTYPE_IMM (delta), buf);
+ if (!riscv_opts.relax && S_IS_LOCAL (fixP->fx_addsy))
+ fixP->fx_done = 1;
}
break;
--
2.43.2