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inline cpu_halted into sole caller

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All implementations are now the same, and there is only one caller,
so inline the function there.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
This commit is contained in:
Paolo Bonzini
2011-03-12 17:43:56 +01:00
committed by Blue Swirl
parent 38a42e7c52
commit eda48c344f
12 changed files with 7 additions and 124 deletions
Download Patch File Download Diff File Expand all files Collapse all files

9
cpu-exec.c
View File

@@ -208,8 +208,13 @@ int cpu_exec(CPUState *env1)
uint8_t *tc_ptr;
unsigned long next_tb;
if (cpu_halted(env1) == EXCP_HALTED)
return EXCP_HALTED;
if (env1->halted) {
if (!cpu_has_work(env1)) {
return EXCP_HALTED;
}
env1->halted = 0;
}
cpu_single_env = env1;

11
target-alpha/exec.h
View File

@@ -42,17 +42,6 @@ static inline int cpu_has_work(CPUState *env)
return (env->interrupt_request & CPU_INTERRUPT_HARD);
}
static inline int cpu_halted(CPUState *env)
{
if (!env->halted)
return 0;
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
{
env->pc = tb->pc;

13
target-arm/exec.h
View File

@@ -32,19 +32,6 @@ static inline int cpu_has_work(CPUState *env)
(CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD | CPU_INTERRUPT_EXITTB));
}
static inline int cpu_halted(CPUState *env) {
if (!env->halted)
return 0;
/* An interrupt wakes the CPU even if the I and F CPSR bits are
set. We use EXITTB to silently wake CPU without causing an
actual interrupt. */
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
#if !defined(CONFIG_USER_ONLY)
#include "softmmu_exec.h"
#endif

11
target-cris/exec.h
View File

@@ -33,17 +33,6 @@ static inline int cpu_has_work(CPUState *env)
return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI));
}
static inline int cpu_halted(CPUState *env) {
if (!env->halted)
return 0;
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
{
env->pc = tb->pc;

12
target-i386/exec.h
View File

@@ -304,18 +304,6 @@ static inline int cpu_has_work(CPUState *env)
return work;
}
static inline int cpu_halted(CPUState *env) {
/* handle exit of HALTED state */
if (!env->halted)
return 0;
/* disable halt condition */
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
/* load efer and update the corresponding hflags. XXX: do consistency
checks with cpuid bits ? */
static inline void cpu_load_efer(CPUState *env, uint64_t val)

10
target-m68k/exec.h
View File

@@ -33,16 +33,6 @@ static inline int cpu_has_work(CPUState *env)
return (env->interrupt_request & (CPU_INTERRUPT_HARD));
}
static inline int cpu_halted(CPUState *env) {
if (!env->halted)
return 0;
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
{
env->pc = tb->pc;

11
target-microblaze/exec.h
View File

@@ -32,17 +32,6 @@ static inline int cpu_has_work(CPUState *env)
return (env->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_NMI));
}
static inline int cpu_halted(CPUState *env) {
if (!env->halted)
return 0;
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
{
env->sregs[SR_PC] = tb->pc;

11
target-mips/exec.h
View File

@@ -36,17 +36,6 @@ static inline int cpu_has_work(CPUState *env)
return has_work;
}
static inline int cpu_halted(CPUState *env)
{
if (!env->halted)
return 0;
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
static inline void compute_hflags(CPUState *env)
{
env->hflags &= ~(MIPS_HFLAG_COP1X | MIPS_HFLAG_64 | MIPS_HFLAG_CP0 |

11
target-ppc/exec.h
View File

@@ -38,17 +38,6 @@ static inline int cpu_has_work(CPUState *env)
}
static inline int cpu_halted(CPUState *env)
{
if (!env->halted)
return 0;
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
{
env->nip = tb->pc;

12
target-s390x/exec.h
View File

@@ -34,18 +34,6 @@ static inline int cpu_has_work(CPUState *env)
return env->interrupt_request & CPU_INTERRUPT_HARD; // guess
}
static inline int cpu_halted(CPUState *env)
{
if (!env->halted) {
return 0;
}
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock* tb)
{
env->psw.addr = tb->pc;

10
target-sh4/exec.h
View File

@@ -32,16 +32,6 @@ static inline int cpu_has_work(CPUState *env)
return (env->interrupt_request & CPU_INTERRUPT_HARD);
}
static inline int cpu_halted(CPUState *env) {
if (!env->halted)
return 0;
if (cpu_has_work(env)) {
env->halted = 0;
return 0;
}
return EXCP_HALTED;
}
#ifndef CONFIG_USER_ONLY
#include "softmmu_exec.h"
#endif

10
target-sparc/exec.h
View File

@@ -22,16 +22,6 @@ static inline int cpu_has_work(CPUState *env1)
}
static inline int cpu_halted(CPUState *env1) {
if (!env1->halted)
return 0;
if (cpu_has_work(env1)) {
env1->halted = 0;
return 0;
}
return EXCP_HALTED;
}
static inline void cpu_pc_from_tb(CPUState *env, TranslationBlock *tb)
{
env->pc = tb->pc;