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98 Commits

Author SHA1 Message Date
Richard Henderson
12d36294a2 target/sparc: Restrict STQF to sparcv9 
Prior to sparcv9, the same encoding was STDFQ.

Cc: qemu-stable@nongnu.org
Fixes: 06c060d9e5 ("target/sparc: Move simple fp load/store to decodetree")
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20240816072311.353234-2-richard.henderson@linaro.org>
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
 2024-08-20 00:49:14 +02:00
Richard Henderson
6fbc032cbc target/sparc: Implement MWAIT 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:10:02 -07:00
Richard Henderson
56f2ef9c79 target/sparc: Implement SUBXC, SUBXCcc 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:10:02 -07:00
Richard Henderson
db11dfea83 target/sparc: Implement FPMIN, FPMAX 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:10:02 -07:00
Richard Henderson
b3c934dd34 target/sparc: Implement VIS4 comparisons 
VIS4 completes the set, adding missing signed 8-bit ops
and missing unsigned 16 and 32-bit ops.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:09:36 -07:00
Richard Henderson
b99c1bbddd target/sparc: Implement 8-bit FPADD, FPADDS, and FPADDUS 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:09:36 -07:00
Richard Henderson
b2b4849336 target/sparc: Implement FALIGNDATAi 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:08:54 -07:00
Richard Henderson
68a414e99d target/sparc: Implement IMA extension 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:08:39 -07:00
Richard Henderson
029b0283df target/sparc: Implement XMULX 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:08:39 -07:00
Richard Henderson
680af1b4a5 target/sparc: Implement UMULXHI 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:08:39 -07:00
Richard Henderson
7d5ebd8ffe target/sparc: Implement PDISTN 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:08:39 -07:00
Richard Henderson
09b157e628 target/sparc: Implement MOVsTOw, MOVdTOx, MOVwTOs, MOVxTOd 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:08:16 -07:00
Richard Henderson
875ce3929a target/sparc: Implement LZCNT 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:08:16 -07:00
Richard Henderson
298c52f784 target/sparc: Implement LDXEFSR 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:07:34 -07:00
Richard Henderson
fbc5c8d4e8 target/sparc: Implement FSLL, FSRL, FSRA, FSLAS 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:07:34 -07:00
Richard Henderson
669e077437 target/sparc: Implement FPCMPEQ8, FPCMPNE8, FPCMPULE8, FPCMPUGT8 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:06:32 -07:00
Richard Henderson
0d1d3aaf64 target/sparc: Implement FPADDS, FPSUBS 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:53 -07:00
Richard Henderson
bc3f14a9ed target/sparc: Implement FPADD64, FPSUB64 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:53 -07:00
Richard Henderson
d6ff1ccb45 target/sparc: Implement FMEAN16 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:53 -07:00
Richard Henderson
1d3ed3d728 target/sparc: Implement FLCMP 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:53 -07:00
Richard Henderson
3d50b7287e target/sparc: Implement FHADD, FHSUB, FNHADD, FNADD, FNMUL 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:53 -07:00
Richard Henderson
7837185e40 target/sparc: Implement FCHKSM16 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:41 -07:00
Richard Henderson
c973b4e8df target/sparc: Implement CMASK instructions 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:11 -07:00
Richard Henderson
015fc6fcdb target/sparc: Implement ADDXC, ADDXCcc 
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:10 -07:00
Richard Henderson
4fd71d19ac target/sparc: Implement FMAf extension 
Rearrange PDIST so that do_dddd is general purpose and may
be re-used for FMADDd etc.  Add pickNaN and pickNaNMulAdd.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:10 -07:00
Richard Henderson
0bba7572d4 target/sparc: Perform DFPREG/QFPREG in decodetree 
Form the proper register decoding from the start.

Because we're removing the translation from the inner-most
gen_load_fpr_* and gen_store_fpr_* routines, this must be
done for all insns at once.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2024-06-05 09:05:10 -07:00
Richard Henderson
7b616f36de target/sparc: Fix FEXPAND 
This is a 2-operand instruction, not 3-operand.
Worse, we took the source from the wrong operand.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20240502165528.244004-3-richard.henderson@linaro.org>
Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
 2024-05-05 21:02:48 +01:00
Richard Henderson
3a6b8de3e2 target/sparc: Implement UDIV inline 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:07:17 -08:00
Richard Henderson
f3141174dd target/sparc: Implement UDIVX and SDIVX inline 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-11-05 12:07:10 -08:00
Richard Henderson
3a38260e3c target/sparc: Convert FZERO, FONE to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
2f72264169 target/sparc: Move FPACK16, FPACKFIX to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
e2fa6bd1ad target/sparc: Move FPCMP* to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
40f9ad219b target/sparc: Convert FCMP, FCMPE to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
f7ec8155f5 target/sparc: Move FMOVR, FMOVcc, FMOVfcc to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
f4e18df576 target/sparc: Move FMOVq, FNEGq, FABSq to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
7b8e3e1a87 target/sparc: Move FdTOq, FxTOq to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
13ebcc7749 target/sparc: Move FiTOq, FsTOq to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
1617586f5a target/sparc: Move FqTOd, FqTOx to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
bd9c5c428f target/sparc: Move FqTOs, FqTOi to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
199d43efb1 target/sparc: Move FiTOd, FsTOd, FsTOx to decodetree 
Note that gen_ne_fop_DF was incorrectly named and does pass env.
The two sets of helpers should have been unified.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
8c94bcd850 target/sparc: Move gen_fop_FD insns to decodetree 
Move FdTOs, FdTOi, FxTOs.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
5e3b17bbe9 target/sparc: Move FDMULQ to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
ff4c711b8d target/sparc: Move FSMULD to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
a405623991 target/sparc: Move gen_fop_QQQ insns to decodetree 
Move FADDq, FSUBq, FMULq, FDIVq.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
f2a59b0ad7 target/sparc: Move gen_fop_DDD insns to decodetree 
Move FADDd, FSUBd, FMULd, FDIVd.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
c1514961e6 target/sparc: Move gen_fop_FFF insns to decodetree 
Move FADDs, FSUBs, FMULs, FDIVs.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
c995216bab target/sparc: Move FSQRTq to decodetree 
Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
8aa418b3ef target/sparc: Move gen_fop_DD insns to decodetree 
Move FSQRTd, FxTOd, FdTOx.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
119cb94f69 target/sparc: Move gen_fop_FF insns to decodetree 
Move FSQRTs, FiTOs, FsTOi.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00
Richard Henderson
4b6edc0a27 target/sparc: Move gen_gsr_fop_DDD insns to decodetree 
Move FPACK32, FALIGNDATA, BSHUFFLE.

Tested-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Acked-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
 2023-10-25 01:01:13 -07:00