Compare commits
49 Commits
rm-protoco
...
v1.6.1
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358bb0daa1 | ||
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3fe494efc5 | ||
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a73c74f63a | ||
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11b0ab70a5 | ||
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260790645e | ||
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52f99b02e5 | ||
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c0c080c5d1 | ||
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670599a08c |
11
block.c
11
block.c
@@ -1606,11 +1606,11 @@ void bdrv_delete(BlockDriverState *bs)
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assert(!bs->job);
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assert(!bs->in_use);
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bdrv_close(bs);
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/* remove from list, if necessary */
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bdrv_make_anon(bs);
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bdrv_close(bs);
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g_free(bs);
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}
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@@ -1803,8 +1803,11 @@ int bdrv_commit(BlockDriverState *bs)
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buf = g_malloc(COMMIT_BUF_SECTORS * BDRV_SECTOR_SIZE);
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for (sector = 0; sector < total_sectors; sector += n) {
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if (bdrv_is_allocated(bs, sector, COMMIT_BUF_SECTORS, &n)) {
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ret = bdrv_is_allocated(bs, sector, COMMIT_BUF_SECTORS, &n);
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if (ret < 0) {
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goto ro_cleanup;
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}
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if (ret) {
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if (bdrv_read(bs, sector, buf, n) != 0) {
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ret = -EIO;
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goto ro_cleanup;
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@@ -189,7 +189,11 @@ static int coroutine_fn cow_read(BlockDriverState *bs, int64_t sector_num,
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int ret, n;
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while (nb_sectors > 0) {
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if (bdrv_co_is_allocated(bs, sector_num, nb_sectors, &n)) {
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ret = bdrv_co_is_allocated(bs, sector_num, nb_sectors, &n);
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if (ret < 0) {
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return ret;
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}
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if (ret) {
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ret = bdrv_pread(bs->file,
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s->cow_sectors_offset + sector_num * 512,
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buf, n * 512);
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@@ -648,13 +648,11 @@ static int coroutine_fn qcow2_co_is_allocated(BlockDriverState *bs,
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int ret;
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*pnum = nb_sectors;
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/* FIXME We can get errors here, but the bdrv_co_is_allocated interface
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* can't pass them on today */
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qemu_co_mutex_lock(&s->lock);
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ret = qcow2_get_cluster_offset(bs, sector_num << 9, pnum, &cluster_offset);
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qemu_co_mutex_unlock(&s->lock);
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if (ret < 0) {
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*pnum = 0;
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return ret;
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}
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return (cluster_offset != 0) || (ret == QCOW2_CLUSTER_ZERO);
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@@ -535,13 +535,29 @@ static int hdev_open(BlockDriverState *bs, QDict *options, int flags)
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{
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BDRVRawState *s = bs->opaque;
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int access_flags, create_flags;
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int ret = 0;
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DWORD overlapped;
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char device_name[64];
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const char *filename = qdict_get_str(options, "filename");
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Error *local_err = NULL;
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const char *filename;
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QemuOpts *opts = qemu_opts_create_nofail(&raw_runtime_opts);
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qemu_opts_absorb_qdict(opts, options, &local_err);
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if (error_is_set(&local_err)) {
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qerror_report_err(local_err);
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error_free(local_err);
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ret = -EINVAL;
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goto done;
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}
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filename = qemu_opt_get(opts, "filename");
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if (strstart(filename, "/dev/cdrom", NULL)) {
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if (find_cdrom(device_name, sizeof(device_name)) < 0)
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return -ENOENT;
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if (find_cdrom(device_name, sizeof(device_name)) < 0) {
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ret = -ENOENT;
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goto done;
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}
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filename = device_name;
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} else {
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/* transform drive letters into device name */
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@@ -564,11 +580,17 @@ static int hdev_open(BlockDriverState *bs, QDict *options, int flags)
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if (s->hfile == INVALID_HANDLE_VALUE) {
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int err = GetLastError();
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if (err == ERROR_ACCESS_DENIED)
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return -EACCES;
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return -1;
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if (err == ERROR_ACCESS_DENIED) {
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ret = -EACCES;
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} else {
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ret = -1;
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}
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goto done;
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}
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return 0;
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done:
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qemu_opts_del(opts);
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return ret;
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}
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static BlockDriver bdrv_host_device = {
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@@ -934,7 +934,7 @@ static int qemu_rbd_snap_list(BlockDriverState *bs,
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do {
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snaps = g_malloc(sizeof(*snaps) * max_snaps);
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snap_count = rbd_snap_list(s->image, snaps, &max_snaps);
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if (snap_count < 0) {
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if (snap_count <= 0) {
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g_free(snaps);
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}
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} while (snap_count == -ERANGE);
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@@ -958,6 +958,7 @@ static int qemu_rbd_snap_list(BlockDriverState *bs,
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sn_info->vm_clock_nsec = 0;
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}
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rbd_snap_list_end(snaps);
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g_free(snaps);
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done:
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*psn_tab = sn_tab;
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@@ -120,7 +120,7 @@ wait:
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if (ret == 1) {
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/* Allocated in the top, no need to copy. */
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copy = false;
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} else {
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} else if (ret >= 0) {
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/* Copy if allocated in the intermediate images. Limit to the
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* known-unallocated area [sector_num, sector_num+n). */
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ret = bdrv_co_is_allocated_above(bs->backing_hd, base,
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@@ -105,7 +105,7 @@ typedef struct VmdkExtent {
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uint32_t l2_cache_offsets[L2_CACHE_SIZE];
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uint32_t l2_cache_counts[L2_CACHE_SIZE];
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unsigned int cluster_sectors;
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int64_t cluster_sectors;
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} VmdkExtent;
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typedef struct BDRVVmdkState {
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@@ -416,7 +416,7 @@ static int vmdk_add_extent(BlockDriverState *bs,
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extent->l1_size = l1_size;
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extent->l1_entry_sectors = l2_size * cluster_sectors;
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extent->l2_size = l2_size;
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extent->cluster_sectors = cluster_sectors;
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extent->cluster_sectors = flat ? sectors : cluster_sectors;
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if (s->num_extents > 1) {
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extent->end_sector = (*(extent - 1)).end_sector + extent->sectors;
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@@ -736,7 +736,7 @@ static int vmdk_parse_extents(const char *desc, BlockDriverState *bs,
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VmdkExtent *extent;
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ret = vmdk_add_extent(bs, extent_file, true, sectors,
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0, 0, 0, 0, sectors, &extent);
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0, 0, 0, 0, 0, &extent);
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if (ret < 0) {
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return ret;
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}
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@@ -460,7 +460,7 @@ static DriveInfo *blockdev_init(QemuOpts *all_opts,
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if (qemu_opt_get_bool(opts, "cache.direct", false)) {
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bdrv_flags |= BDRV_O_NOCACHE;
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}
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if (qemu_opt_get_bool(opts, "cache.no-flush", true)) {
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if (qemu_opt_get_bool(opts, "cache.no-flush", false)) {
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bdrv_flags |= BDRV_O_NO_FLUSH;
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}
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24
configure
vendored
24
configure
vendored
@@ -235,6 +235,7 @@ guest_agent=""
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want_tools="yes"
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libiscsi=""
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coroutine=""
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coroutine_pool=""
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seccomp=""
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glusterfs=""
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glusterfs_discard="no"
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@@ -871,6 +872,10 @@ for opt do
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;;
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--with-coroutine=*) coroutine="$optarg"
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;;
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--disable-coroutine-pool) coroutine_pool="no"
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;;
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--enable-coroutine-pool) coroutine_pool="yes"
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;;
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--disable-docs) docs="no"
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;;
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--enable-docs) docs="yes"
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@@ -1152,6 +1157,8 @@ echo " --disable-seccomp disable seccomp support"
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echo " --enable-seccomp enables seccomp support"
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echo " --with-coroutine=BACKEND coroutine backend. Supported options:"
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echo " gthread, ucontext, sigaltstack, windows"
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echo " --disable-coroutine-pool disable coroutine freelist (worse performance)"
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echo " --enable-coroutine-pool enable coroutine freelist (better performance)"
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echo " --enable-glusterfs enable GlusterFS backend"
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echo " --disable-glusterfs disable GlusterFS backend"
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echo " --enable-gcov enable test coverage analysis with gcov"
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@@ -3240,6 +3247,17 @@ else
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esac
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fi
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if test "$coroutine_pool" = ""; then
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if test "$coroutine" = "gthread"; then
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coroutine_pool=no
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else
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coroutine_pool=yes
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fi
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fi
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if test "$coroutine" = "gthread" -a "$coroutine_pool" = "yes"; then
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error_exit "'gthread' coroutine backend does not support pool (use --disable-coroutine-pool)"
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fi
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##########################################
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# check if we have open_by_handle_at
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@@ -3605,6 +3623,7 @@ echo "libiscsi support $libiscsi"
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echo "build guest agent $guest_agent"
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echo "seccomp support $seccomp"
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echo "coroutine backend $coroutine"
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echo "coroutine pool $coroutine_pool"
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echo "GlusterFS support $glusterfs"
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echo "virtio-blk-data-plane $virtio_blk_data_plane"
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echo "gcov $gcov_tool"
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@@ -3954,6 +3973,11 @@ if test "$rbd" = "yes" ; then
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fi
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echo "CONFIG_COROUTINE_BACKEND=$coroutine" >> $config_host_mak
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if test "$coroutine_pool" = "yes" ; then
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echo "CONFIG_COROUTINE_POOL=1" >> $config_host_mak
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else
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echo "CONFIG_COROUTINE_POOL=0" >> $config_host_mak
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fi
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if test "$open_by_handle_at" = "yes" ; then
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echo "CONFIG_OPEN_BY_HANDLE=y" >> $config_host_mak
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|
9
exec.c
9
exec.c
@@ -869,7 +869,7 @@ static void mem_add(MemoryListener *listener, MemoryRegionSection *section)
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now = remain;
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if (int128_lt(remain.size, page_size)) {
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register_subpage(d, &now);
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} else if (remain.offset_within_region & ~TARGET_PAGE_MASK) {
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} else if (remain.offset_within_address_space & ~TARGET_PAGE_MASK) {
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now.size = page_size;
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register_subpage(d, &now);
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} else {
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@@ -1172,6 +1172,7 @@ ram_addr_t qemu_ram_alloc_from_ptr(ram_addr_t size, void *host,
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qemu_ram_setup_dump(new_block->host, size);
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qemu_madvise(new_block->host, size, QEMU_MADV_HUGEPAGE);
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qemu_madvise(new_block->host, size, QEMU_MADV_DONTFORK);
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if (kvm_enabled())
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kvm_setup_guest_memory(new_block->host, size);
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@@ -1820,7 +1821,8 @@ static void memory_map_init(void)
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address_space_init(&address_space_memory, system_memory, "memory");
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||||
|
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system_io = g_malloc(sizeof(*system_io));
|
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memory_region_init(system_io, NULL, "io", 65536);
|
||||
memory_region_init_io(system_io, NULL, &unassigned_io_ops, NULL, "io",
|
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65536);
|
||||
address_space_init(&address_space_io, system_io, "I/O");
|
||||
|
||||
memory_listener_register(&core_memory_listener, &address_space_memory);
|
||||
@@ -1928,6 +1930,9 @@ static int memory_access_size(MemoryRegion *mr, unsigned l, hwaddr addr)
|
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if (l > access_size_max) {
|
||||
l = access_size_max;
|
||||
}
|
||||
if (l & (l - 1)) {
|
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l = 1 << (qemu_fls(l) - 1);
|
||||
}
|
||||
|
||||
return l;
|
||||
}
|
||||
|
@@ -621,6 +621,8 @@ void gdb_register_coprocessor(CPUState *cpu,
|
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if (g_pos != s->base_reg) {
|
||||
fprintf(stderr, "Error: Bad gdb register numbering for '%s'\n"
|
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"Expected %d got %d\n", xml, g_pos, s->base_reg);
|
||||
} else {
|
||||
cpu->gdb_num_g_regs = cpu->gdb_num_regs;
|
||||
}
|
||||
}
|
||||
}
|
||||
@@ -902,7 +904,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
|
||||
case 'g':
|
||||
cpu_synchronize_state(s->g_cpu);
|
||||
len = 0;
|
||||
for (addr = 0; addr < s->g_cpu->gdb_num_regs; addr++) {
|
||||
for (addr = 0; addr < s->g_cpu->gdb_num_g_regs; addr++) {
|
||||
reg_size = gdb_read_register(s->g_cpu, mem_buf + len, addr);
|
||||
len += reg_size;
|
||||
}
|
||||
@@ -914,7 +916,7 @@ static int gdb_handle_packet(GDBState *s, const char *line_buf)
|
||||
registers = mem_buf;
|
||||
len = strlen(p) / 2;
|
||||
hextomem((uint8_t *)registers, p, len);
|
||||
for (addr = 0; addr < s->g_cpu->gdb_num_regs && len > 0; addr++) {
|
||||
for (addr = 0; addr < s->g_cpu->gdb_num_g_regs && len > 0; addr++) {
|
||||
reg_size = gdb_write_register(s->g_cpu, registers, addr);
|
||||
len -= reg_size;
|
||||
registers += reg_size;
|
||||
|
@@ -324,12 +324,13 @@ static void acpi_notify_wakeup(Notifier *notifier, void *data)
|
||||
(ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_TIMER_STATUS);
|
||||
break;
|
||||
case QEMU_WAKEUP_REASON_OTHER:
|
||||
default:
|
||||
/* ACPI_BITMASK_WAKE_STATUS should be set on resume.
|
||||
Pretend that resume was caused by power button */
|
||||
ar->pm1.evt.sts |=
|
||||
(ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_POWER_BUTTON_STATUS);
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
|
@@ -380,6 +380,7 @@ static void piix4_reset(void *opaque)
|
||||
/* Mark SMM as already inited (until KVM supports SMM). */
|
||||
pci_conf[0x5B] = 0x02;
|
||||
}
|
||||
pm_io_space_update(s);
|
||||
piix4_update_hotplug(s);
|
||||
}
|
||||
|
||||
|
@@ -284,9 +284,9 @@ static void Adlib_fini (AdlibState *s)
|
||||
}
|
||||
|
||||
static MemoryRegionPortio adlib_portio_list[] = {
|
||||
{ 0x388, 4, 1, .read = adlib_read, .write = adlib_write, },
|
||||
{ 0, 4, 1, .read = adlib_read, .write = adlib_write, },
|
||||
{ 0, 2, 1, .read = adlib_read, .write = adlib_write, },
|
||||
{ 0x388, 4, 1, .read = adlib_read, .write = adlib_write, },
|
||||
PORTIO_END_OF_LIST(),
|
||||
};
|
||||
|
||||
|
@@ -460,9 +460,9 @@ static void virtio_blk_dma_restart_cb(void *opaque, int running,
|
||||
|
||||
static void virtio_blk_reset(VirtIODevice *vdev)
|
||||
{
|
||||
#ifdef CONFIG_VIRTIO_BLK_DATA_PLANE
|
||||
VirtIOBlock *s = VIRTIO_BLK(vdev);
|
||||
|
||||
#ifdef CONFIG_VIRTIO_BLK_DATA_PLANE
|
||||
if (s->dataplane) {
|
||||
virtio_blk_data_plane_stop(s->dataplane);
|
||||
}
|
||||
@@ -473,6 +473,7 @@ static void virtio_blk_reset(VirtIODevice *vdev)
|
||||
* are per-device request lists.
|
||||
*/
|
||||
bdrv_drain_all();
|
||||
bdrv_set_enable_write_cache(s->bs, s->original_wce);
|
||||
}
|
||||
|
||||
/* coalesce internal state, copy to pci i/o region 0
|
||||
@@ -564,7 +565,25 @@ static void virtio_blk_set_status(VirtIODevice *vdev, uint8_t status)
|
||||
}
|
||||
|
||||
features = vdev->guest_features;
|
||||
bdrv_set_enable_write_cache(s->bs, !!(features & (1 << VIRTIO_BLK_F_WCE)));
|
||||
|
||||
/* A guest that supports VIRTIO_BLK_F_CONFIG_WCE must be able to send
|
||||
* cache flushes. Thus, the "auto writethrough" behavior is never
|
||||
* necessary for guests that support the VIRTIO_BLK_F_CONFIG_WCE feature.
|
||||
* Leaving it enabled would break the following sequence:
|
||||
*
|
||||
* Guest started with "-drive cache=writethrough"
|
||||
* Guest sets status to 0
|
||||
* Guest sets DRIVER bit in status field
|
||||
* Guest reads host features (WCE=0, CONFIG_WCE=1)
|
||||
* Guest writes guest features (WCE=0, CONFIG_WCE=1)
|
||||
* Guest writes 1 to the WCE configuration field (writeback mode)
|
||||
* Guest sets DRIVER_OK bit in status field
|
||||
*
|
||||
* s->bs would erroneously be placed in writethrough mode.
|
||||
*/
|
||||
if (!(features & (1 << VIRTIO_BLK_F_CONFIG_WCE))) {
|
||||
bdrv_set_enable_write_cache(s->bs, !!(features & (1 << VIRTIO_BLK_F_WCE)));
|
||||
}
|
||||
}
|
||||
|
||||
static void virtio_blk_save(QEMUFile *f, void *opaque)
|
||||
@@ -674,6 +693,7 @@ static int virtio_blk_device_init(VirtIODevice *vdev)
|
||||
}
|
||||
|
||||
blkconf_serial(&blk->conf, &blk->serial);
|
||||
s->original_wce = bdrv_enable_write_cache(blk->conf.bs);
|
||||
if (blkconf_geometry(&blk->conf, NULL, 65535, 255, 255) < 0) {
|
||||
return -1;
|
||||
}
|
||||
|
@@ -47,6 +47,8 @@ static int vty_getchars(VIOsPAPRDevice *sdev, uint8_t *buf, int max)
|
||||
buf[n++] = dev->buf[dev->out++ % VTERM_BUFSIZE];
|
||||
}
|
||||
|
||||
qemu_chr_accept_input(dev->chardev);
|
||||
|
||||
return n;
|
||||
}
|
||||
|
||||
|
@@ -31,10 +31,6 @@ static void qxl_blit(PCIQXLDevice *qxl, QXLRect *rect)
|
||||
if (is_buffer_shared(surface)) {
|
||||
return;
|
||||
}
|
||||
if (!qxl->guest_primary.data) {
|
||||
trace_qxl_render_blit_guest_primary_initialized();
|
||||
qxl->guest_primary.data = memory_region_get_ram_ptr(&qxl->vga.vram);
|
||||
}
|
||||
trace_qxl_render_blit(qxl->guest_primary.qxl_stride,
|
||||
rect->left, rect->right, rect->top, rect->bottom);
|
||||
src = qxl->guest_primary.data;
|
||||
@@ -104,7 +100,12 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl)
|
||||
|
||||
if (qxl->guest_primary.resized) {
|
||||
qxl->guest_primary.resized = 0;
|
||||
qxl->guest_primary.data = memory_region_get_ram_ptr(&qxl->vga.vram);
|
||||
qxl->guest_primary.data = qxl_phys2virt(qxl,
|
||||
qxl->guest_primary.surface.mem,
|
||||
MEMSLOT_GROUP_GUEST);
|
||||
if (!qxl->guest_primary.data) {
|
||||
return;
|
||||
}
|
||||
qxl_set_rect_to_surface(qxl, &qxl->dirty[0]);
|
||||
qxl->num_dirty_rects = 1;
|
||||
trace_qxl_render_guest_primary_resized(
|
||||
@@ -128,6 +129,10 @@ static void qxl_render_update_area_unlocked(PCIQXLDevice *qxl)
|
||||
}
|
||||
dpy_gfx_replace_surface(vga->con, surface);
|
||||
}
|
||||
|
||||
if (!qxl->guest_primary.data) {
|
||||
return;
|
||||
}
|
||||
for (i = 0; i < qxl->num_dirty_rects; i++) {
|
||||
if (qemu_spice_rect_is_empty(qxl->dirty+i)) {
|
||||
break;
|
||||
|
@@ -510,9 +510,8 @@ static void vapic_reset(DeviceState *dev)
|
||||
{
|
||||
VAPICROMState *s = VAPIC(dev);
|
||||
|
||||
if (s->state == VAPIC_ACTIVE) {
|
||||
s->state = VAPIC_STANDBY;
|
||||
}
|
||||
s->state = VAPIC_INACTIVE;
|
||||
s->rom_state_paddr = 0;
|
||||
vapic_enable_tpr_reporting(false);
|
||||
}
|
||||
|
||||
@@ -578,7 +577,7 @@ static int patch_hypercalls(VAPICROMState *s)
|
||||
* enable write access to the option ROM so that variables can be updated by
|
||||
* the guest.
|
||||
*/
|
||||
static void vapic_map_rom_writable(VAPICROMState *s)
|
||||
static int vapic_map_rom_writable(VAPICROMState *s)
|
||||
{
|
||||
hwaddr rom_paddr = s->rom_state_paddr & ROM_BLOCK_MASK;
|
||||
MemoryRegionSection section;
|
||||
@@ -599,6 +598,9 @@ static void vapic_map_rom_writable(VAPICROMState *s)
|
||||
/* read ROM size from RAM region */
|
||||
ram = memory_region_get_ram_ptr(section.mr);
|
||||
rom_size = ram[rom_paddr + 2] * ROM_BLOCK_SIZE;
|
||||
if (rom_size == 0) {
|
||||
return -1;
|
||||
}
|
||||
s->rom_size = rom_size;
|
||||
|
||||
/* We need to round to avoid creating subpages
|
||||
@@ -612,11 +614,15 @@ static void vapic_map_rom_writable(VAPICROMState *s)
|
||||
memory_region_add_subregion_overlap(as, rom_paddr, &s->rom, 1000);
|
||||
s->rom_mapped_writable = true;
|
||||
memory_region_unref(section.mr);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int vapic_prepare(VAPICROMState *s)
|
||||
{
|
||||
vapic_map_rom_writable(s);
|
||||
if (vapic_map_rom_writable(s) < 0) {
|
||||
return -1;
|
||||
}
|
||||
|
||||
if (patch_hypercalls(s) < 0) {
|
||||
return -1;
|
||||
@@ -659,6 +665,7 @@ static void vapic_write(void *opaque, hwaddr addr, uint64_t data,
|
||||
}
|
||||
if (vapic_prepare(s) < 0) {
|
||||
s->state = VAPIC_INACTIVE;
|
||||
s->rom_state_paddr = 0;
|
||||
break;
|
||||
}
|
||||
break;
|
||||
|
@@ -93,7 +93,7 @@ static void pc_init1(MemoryRegion *system_memory,
|
||||
FWCfgState *fw_cfg = NULL;
|
||||
PcGuestInfo *guest_info;
|
||||
|
||||
if (xen_enabled() && xen_hvm_init() != 0) {
|
||||
if (xen_enabled() && xen_hvm_init(&ram_memory) != 0) {
|
||||
fprintf(stderr, "xen hardware virtual machine initialisation failed\n");
|
||||
exit(1);
|
||||
}
|
||||
|
@@ -81,6 +81,11 @@ static void pc_q35_init(QEMUMachineInitArgs *args)
|
||||
DeviceState *icc_bridge;
|
||||
PcGuestInfo *guest_info;
|
||||
|
||||
if (xen_enabled() && xen_hvm_init(&ram_memory) != 0) {
|
||||
fprintf(stderr, "xen hardware virtual machine initialisation failed\n");
|
||||
exit(1);
|
||||
}
|
||||
|
||||
icc_bridge = qdev_create(NULL, TYPE_ICC_BRIDGE);
|
||||
object_property_add_child(qdev_get_machine(), "icc-bridge",
|
||||
OBJECT(icc_bridge), NULL);
|
||||
|
@@ -693,7 +693,7 @@ static void ne2000_write(void *opaque, hwaddr addr,
|
||||
static const MemoryRegionOps ne2000_ops = {
|
||||
.read = ne2000_read,
|
||||
.write = ne2000_write,
|
||||
.endianness = DEVICE_NATIVE_ENDIAN,
|
||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
||||
};
|
||||
|
||||
/***********************************************************/
|
||||
|
@@ -134,7 +134,7 @@ static void pcnet_ioport_write(void *opaque, hwaddr addr,
|
||||
static const MemoryRegionOps pcnet_io_ops = {
|
||||
.read = pcnet_ioport_read,
|
||||
.write = pcnet_ioport_write,
|
||||
.endianness = DEVICE_NATIVE_ENDIAN,
|
||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
||||
};
|
||||
|
||||
static void pcnet_mmio_writeb(void *opaque, hwaddr addr, uint32_t val)
|
||||
@@ -256,7 +256,7 @@ static const MemoryRegionOps pcnet_mmio_ops = {
|
||||
.read = { pcnet_mmio_readb, pcnet_mmio_readw, pcnet_mmio_readl },
|
||||
.write = { pcnet_mmio_writeb, pcnet_mmio_writew, pcnet_mmio_writel },
|
||||
},
|
||||
.endianness = DEVICE_NATIVE_ENDIAN,
|
||||
.endianness = DEVICE_LITTLE_ENDIAN,
|
||||
};
|
||||
|
||||
static void pci_physical_memory_write(void *dma_opaque, hwaddr addr,
|
||||
|
@@ -320,6 +320,7 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
|
||||
PCII440FXState *f;
|
||||
unsigned i;
|
||||
I440FXState *i440fx;
|
||||
uint64_t pci_hole64_size;
|
||||
|
||||
dev = qdev_create(NULL, TYPE_I440FX_PCI_HOST_BRIDGE);
|
||||
s = PCI_HOST_BRIDGE(dev);
|
||||
@@ -351,13 +352,15 @@ PCIBus *i440fx_init(PCII440FXState **pi440fx_state,
|
||||
pci_hole_start, pci_hole_size);
|
||||
memory_region_add_subregion(f->system_memory, pci_hole_start, &f->pci_hole);
|
||||
|
||||
pci_hole64_size = pci_host_get_hole64_size(i440fx->pci_hole64_size);
|
||||
|
||||
pc_init_pci64_hole(&i440fx->pci_info, 0x100000000ULL + above_4g_mem_size,
|
||||
i440fx->pci_hole64_size);
|
||||
pci_hole64_size);
|
||||
memory_region_init_alias(&f->pci_hole_64bit, OBJECT(d), "pci-hole64",
|
||||
f->pci_address_space,
|
||||
i440fx->pci_info.w64.begin,
|
||||
i440fx->pci_hole64_size);
|
||||
if (i440fx->pci_hole64_size) {
|
||||
pci_hole64_size);
|
||||
if (pci_hole64_size) {
|
||||
memory_region_add_subregion(f->system_memory,
|
||||
i440fx->pci_info.w64.begin,
|
||||
&f->pci_hole_64bit);
|
||||
|
@@ -320,6 +320,7 @@ static int mch_init(PCIDevice *d)
|
||||
{
|
||||
int i;
|
||||
MCHPCIState *mch = MCH_PCI_DEVICE(d);
|
||||
uint64_t pci_hole64_size;
|
||||
|
||||
/* setup pci memory regions */
|
||||
memory_region_init_alias(&mch->pci_hole, OBJECT(mch), "pci-hole",
|
||||
@@ -329,13 +330,14 @@ static int mch_init(PCIDevice *d)
|
||||
memory_region_add_subregion(mch->system_memory, mch->below_4g_mem_size,
|
||||
&mch->pci_hole);
|
||||
|
||||
pci_hole64_size = pci_host_get_hole64_size(mch->pci_hole64_size);
|
||||
pc_init_pci64_hole(&mch->pci_info, 0x100000000ULL + mch->above_4g_mem_size,
|
||||
mch->pci_hole64_size);
|
||||
pci_hole64_size);
|
||||
memory_region_init_alias(&mch->pci_hole_64bit, OBJECT(mch), "pci-hole64",
|
||||
mch->pci_address_space,
|
||||
mch->pci_info.w64.begin,
|
||||
mch->pci_hole64_size);
|
||||
if (mch->pci_hole64_size) {
|
||||
pci_hole64_size);
|
||||
if (pci_hole64_size) {
|
||||
memory_region_add_subregion(mch->system_memory,
|
||||
mch->pci_info.w64.begin,
|
||||
&mch->pci_hole_64bit);
|
||||
|
@@ -11,6 +11,8 @@ static char *scsibus_get_dev_path(DeviceState *dev);
|
||||
static char *scsibus_get_fw_dev_path(DeviceState *dev);
|
||||
static int scsi_req_parse(SCSICommand *cmd, SCSIDevice *dev, uint8_t *buf);
|
||||
static void scsi_req_dequeue(SCSIRequest *req);
|
||||
static uint8_t *scsi_target_alloc_buf(SCSIRequest *req, size_t len);
|
||||
static void scsi_target_free_buf(SCSIRequest *req);
|
||||
|
||||
static Property scsi_props[] = {
|
||||
DEFINE_PROP_UINT32("channel", SCSIDevice, channel, 0),
|
||||
@@ -224,7 +226,7 @@ SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, BlockDriverState *bdrv,
|
||||
if (object_property_find(OBJECT(dev), "removable", NULL)) {
|
||||
qdev_prop_set_bit(dev, "removable", removable);
|
||||
}
|
||||
if (serial) {
|
||||
if (serial && object_property_find(OBJECT(dev), "serial", NULL)) {
|
||||
qdev_prop_set_string(dev, "serial", serial);
|
||||
}
|
||||
if (qdev_prop_set_drive(dev, "drive", bdrv) < 0) {
|
||||
@@ -317,7 +319,8 @@ typedef struct SCSITargetReq SCSITargetReq;
|
||||
struct SCSITargetReq {
|
||||
SCSIRequest req;
|
||||
int len;
|
||||
uint8_t buf[2056];
|
||||
uint8_t *buf;
|
||||
int buf_len;
|
||||
};
|
||||
|
||||
static void store_lun(uint8_t *outbuf, int lun)
|
||||
@@ -361,14 +364,12 @@ static bool scsi_target_emulate_report_luns(SCSITargetReq *r)
|
||||
if (!found_lun0) {
|
||||
n += 8;
|
||||
}
|
||||
len = MIN(n + 8, r->req.cmd.xfer & ~7);
|
||||
if (len > sizeof(r->buf)) {
|
||||
/* TODO: > 256 LUNs? */
|
||||
return false;
|
||||
}
|
||||
|
||||
scsi_target_alloc_buf(&r->req, n + 8);
|
||||
|
||||
len = MIN(n + 8, r->req.cmd.xfer & ~7);
|
||||
memset(r->buf, 0, len);
|
||||
stl_be_p(&r->buf, n);
|
||||
stl_be_p(r->buf, n);
|
||||
i = found_lun0 ? 8 : 16;
|
||||
QTAILQ_FOREACH(kid, &r->req.bus->qbus.children, sibling) {
|
||||
DeviceState *qdev = kid->child;
|
||||
@@ -387,6 +388,9 @@ static bool scsi_target_emulate_report_luns(SCSITargetReq *r)
|
||||
static bool scsi_target_emulate_inquiry(SCSITargetReq *r)
|
||||
{
|
||||
assert(r->req.dev->lun != r->req.lun);
|
||||
|
||||
scsi_target_alloc_buf(&r->req, SCSI_INQUIRY_LEN);
|
||||
|
||||
if (r->req.cmd.buf[1] & 0x2) {
|
||||
/* Command support data - optional, not implemented */
|
||||
return false;
|
||||
@@ -411,7 +415,7 @@ static bool scsi_target_emulate_inquiry(SCSITargetReq *r)
|
||||
return false;
|
||||
}
|
||||
/* done with EVPD */
|
||||
assert(r->len < sizeof(r->buf));
|
||||
assert(r->len < r->buf_len);
|
||||
r->len = MIN(r->req.cmd.xfer, r->len);
|
||||
return true;
|
||||
}
|
||||
@@ -455,8 +459,8 @@ static int32_t scsi_target_send_command(SCSIRequest *req, uint8_t *buf)
|
||||
}
|
||||
break;
|
||||
case REQUEST_SENSE:
|
||||
r->len = scsi_device_get_sense(r->req.dev, r->buf,
|
||||
MIN(req->cmd.xfer, sizeof r->buf),
|
||||
scsi_target_alloc_buf(&r->req, SCSI_SENSE_LEN);
|
||||
r->len = scsi_device_get_sense(r->req.dev, r->buf, r->buf_len,
|
||||
(req->cmd.buf[1] & 1) == 0);
|
||||
if (r->req.dev->sense_is_ua) {
|
||||
scsi_device_unit_attention_reported(req->dev);
|
||||
@@ -501,11 +505,29 @@ static uint8_t *scsi_target_get_buf(SCSIRequest *req)
|
||||
return r->buf;
|
||||
}
|
||||
|
||||
static uint8_t *scsi_target_alloc_buf(SCSIRequest *req, size_t len)
|
||||
{
|
||||
SCSITargetReq *r = DO_UPCAST(SCSITargetReq, req, req);
|
||||
|
||||
r->buf = g_malloc(len);
|
||||
r->buf_len = len;
|
||||
|
||||
return r->buf;
|
||||
}
|
||||
|
||||
static void scsi_target_free_buf(SCSIRequest *req)
|
||||
{
|
||||
SCSITargetReq *r = DO_UPCAST(SCSITargetReq, req, req);
|
||||
|
||||
g_free(r->buf);
|
||||
}
|
||||
|
||||
static const struct SCSIReqOps reqops_target_command = {
|
||||
.size = sizeof(SCSITargetReq),
|
||||
.send_command = scsi_target_send_command,
|
||||
.read_data = scsi_target_read_data,
|
||||
.get_buf = scsi_target_get_buf,
|
||||
.free_req = scsi_target_free_buf,
|
||||
};
|
||||
|
||||
|
||||
@@ -1365,7 +1387,7 @@ int scsi_build_sense(uint8_t *in_buf, int in_len,
|
||||
buf[7] = 10;
|
||||
buf[12] = sense.asc;
|
||||
buf[13] = sense.ascq;
|
||||
return MIN(len, 18);
|
||||
return MIN(len, SCSI_SENSE_LEN);
|
||||
} else {
|
||||
/* Return descriptor format sense buffer */
|
||||
buf[0] = 0x72;
|
||||
|
@@ -403,7 +403,7 @@ void usb_handle_packet(USBDevice *dev, USBPacket *p)
|
||||
p->ep->halted = false;
|
||||
}
|
||||
|
||||
if (QTAILQ_EMPTY(&p->ep->queue) || p->ep->pipeline) {
|
||||
if (QTAILQ_EMPTY(&p->ep->queue) || p->ep->pipeline || p->stream) {
|
||||
usb_process_one(p);
|
||||
if (p->status == USB_RET_ASYNC) {
|
||||
/* hcd drivers cannot handle async for isoc */
|
||||
@@ -420,7 +420,8 @@ void usb_handle_packet(USBDevice *dev, USBPacket *p)
|
||||
* When pipelining is enabled usb-devices must always return async,
|
||||
* otherwise packets can complete out of order!
|
||||
*/
|
||||
assert(!p->ep->pipeline || QTAILQ_EMPTY(&p->ep->queue));
|
||||
assert(p->stream || !p->ep->pipeline ||
|
||||
QTAILQ_EMPTY(&p->ep->queue));
|
||||
if (p->status != USB_RET_NAK) {
|
||||
usb_packet_set_state(p, USB_PACKET_COMPLETE);
|
||||
}
|
||||
@@ -434,7 +435,7 @@ void usb_packet_complete_one(USBDevice *dev, USBPacket *p)
|
||||
{
|
||||
USBEndpoint *ep = p->ep;
|
||||
|
||||
assert(QTAILQ_FIRST(&ep->queue) == p);
|
||||
assert(p->stream || QTAILQ_FIRST(&ep->queue) == p);
|
||||
assert(p->status != USB_RET_ASYNC && p->status != USB_RET_NAK);
|
||||
|
||||
if (p->status != USB_RET_SUCCESS ||
|
||||
|
@@ -658,7 +658,7 @@ static void usb_tablet_class_initfn(ObjectClass *klass, void *data)
|
||||
uc->product_desc = "QEMU USB Tablet";
|
||||
dc->vmsd = &vmstate_usb_ptr;
|
||||
dc->props = usb_tablet_properties;
|
||||
set_bit(DEVICE_CATEGORY_MISC, dc->categories);
|
||||
set_bit(DEVICE_CATEGORY_INPUT, dc->categories);
|
||||
}
|
||||
|
||||
static const TypeInfo usb_tablet_info = {
|
||||
|
@@ -33,7 +33,6 @@ typedef struct USBHubPort {
|
||||
USBPort port;
|
||||
uint16_t wPortStatus;
|
||||
uint16_t wPortChange;
|
||||
uint16_t wPortChange_reported;
|
||||
} USBHubPort;
|
||||
|
||||
typedef struct USBHubState {
|
||||
@@ -468,11 +467,8 @@ static void usb_hub_handle_data(USBDevice *dev, USBPacket *p)
|
||||
status = 0;
|
||||
for(i = 0; i < NUM_PORTS; i++) {
|
||||
port = &s->ports[i];
|
||||
if (port->wPortChange &&
|
||||
port->wPortChange_reported != port->wPortChange) {
|
||||
if (port->wPortChange)
|
||||
status |= (1 << (i + 1));
|
||||
}
|
||||
port->wPortChange_reported = port->wPortChange;
|
||||
}
|
||||
if (status != 0) {
|
||||
for(i = 0; i < n; i++) {
|
||||
|
@@ -1241,13 +1241,11 @@ static int ehci_init_transfer(EHCIPacket *p)
|
||||
{
|
||||
uint32_t cpage, offset, bytes, plen;
|
||||
dma_addr_t page;
|
||||
USBBus *bus = &p->queue->ehci->bus;
|
||||
BusState *qbus = BUS(bus);
|
||||
|
||||
cpage = get_field(p->qtd.token, QTD_TOKEN_CPAGE);
|
||||
bytes = get_field(p->qtd.token, QTD_TOKEN_TBYTES);
|
||||
offset = p->qtd.bufptr[0] & ~QTD_BUFPTR_MASK;
|
||||
qemu_sglist_init(&p->sgl, qbus->parent, 5, p->queue->ehci->as);
|
||||
qemu_sglist_init(&p->sgl, p->queue->ehci->device, 5, p->queue->ehci->as);
|
||||
|
||||
while (bytes > 0) {
|
||||
if (cpage > 4) {
|
||||
@@ -1486,7 +1484,7 @@ static int ehci_process_itd(EHCIState *ehci,
|
||||
return -1;
|
||||
}
|
||||
|
||||
qemu_sglist_init(&ehci->isgl, DEVICE(ehci), 2, ehci->as);
|
||||
qemu_sglist_init(&ehci->isgl, ehci->device, 2, ehci->as);
|
||||
if (off + len > 4096) {
|
||||
/* transfer crosses page border */
|
||||
uint32_t len2 = off + len - 4096;
|
||||
@@ -2529,6 +2527,7 @@ void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp)
|
||||
|
||||
s->frame_timer = qemu_new_timer_ns(vm_clock, ehci_frame_timer, s);
|
||||
s->async_bh = qemu_bh_new(ehci_frame_timer, s);
|
||||
s->device = dev;
|
||||
|
||||
qemu_register_reset(ehci_reset, s);
|
||||
qemu_add_vm_change_state_handler(usb_ehci_vm_state_change, s);
|
||||
|
@@ -255,6 +255,7 @@ typedef QTAILQ_HEAD(EHCIQueueHead, EHCIQueue) EHCIQueueHead;
|
||||
|
||||
struct EHCIState {
|
||||
USBBus bus;
|
||||
DeviceState *device;
|
||||
qemu_irq irq;
|
||||
MemoryRegion mem;
|
||||
AddressSpace *as;
|
||||
|
@@ -355,6 +355,7 @@ typedef struct XHCITransfer {
|
||||
unsigned int streamid;
|
||||
bool in_xfer;
|
||||
bool iso_xfer;
|
||||
bool timed_xfer;
|
||||
|
||||
unsigned int trb_count;
|
||||
unsigned int trb_alloced;
|
||||
@@ -1257,7 +1258,7 @@ static void xhci_init_epctx(XHCIEPContext *epctx,
|
||||
epctx->ring.ccs = ctx[2] & 1;
|
||||
}
|
||||
|
||||
epctx->interval = 1 << (ctx[0] >> 16) & 0xff;
|
||||
epctx->interval = 1 << ((ctx[0] >> 16) & 0xff);
|
||||
}
|
||||
|
||||
static TRBCCode xhci_enable_ep(XHCIState *xhci, unsigned int slotid,
|
||||
@@ -1803,6 +1804,7 @@ static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer)
|
||||
|
||||
xfer->in_xfer = bmRequestType & USB_DIR_IN;
|
||||
xfer->iso_xfer = false;
|
||||
xfer->timed_xfer = false;
|
||||
|
||||
if (xhci_setup_packet(xfer) < 0) {
|
||||
return -1;
|
||||
@@ -1818,6 +1820,17 @@ static int xhci_fire_ctl_transfer(XHCIState *xhci, XHCITransfer *xfer)
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void xhci_calc_intr_kick(XHCIState *xhci, XHCITransfer *xfer,
|
||||
XHCIEPContext *epctx, uint64_t mfindex)
|
||||
{
|
||||
uint64_t asap = ((mfindex + epctx->interval - 1) &
|
||||
~(epctx->interval-1));
|
||||
uint64_t kick = epctx->mfindex_last + epctx->interval;
|
||||
|
||||
assert(epctx->interval != 0);
|
||||
xfer->mfindex_kick = MAX(asap, kick);
|
||||
}
|
||||
|
||||
static void xhci_calc_iso_kick(XHCIState *xhci, XHCITransfer *xfer,
|
||||
XHCIEPContext *epctx, uint64_t mfindex)
|
||||
{
|
||||
@@ -1840,8 +1853,8 @@ static void xhci_calc_iso_kick(XHCIState *xhci, XHCITransfer *xfer,
|
||||
}
|
||||
}
|
||||
|
||||
static void xhci_check_iso_kick(XHCIState *xhci, XHCITransfer *xfer,
|
||||
XHCIEPContext *epctx, uint64_t mfindex)
|
||||
static void xhci_check_intr_iso_kick(XHCIState *xhci, XHCITransfer *xfer,
|
||||
XHCIEPContext *epctx, uint64_t mfindex)
|
||||
{
|
||||
if (xfer->mfindex_kick > mfindex) {
|
||||
qemu_mod_timer(epctx->kick_timer, qemu_get_clock_ns(vm_clock) +
|
||||
@@ -1866,18 +1879,30 @@ static int xhci_submit(XHCIState *xhci, XHCITransfer *xfer, XHCIEPContext *epctx
|
||||
switch(epctx->type) {
|
||||
case ET_INTR_OUT:
|
||||
case ET_INTR_IN:
|
||||
xfer->pkts = 0;
|
||||
xfer->iso_xfer = false;
|
||||
xfer->timed_xfer = true;
|
||||
mfindex = xhci_mfindex_get(xhci);
|
||||
xhci_calc_intr_kick(xhci, xfer, epctx, mfindex);
|
||||
xhci_check_intr_iso_kick(xhci, xfer, epctx, mfindex);
|
||||
if (xfer->running_retry) {
|
||||
return -1;
|
||||
}
|
||||
break;
|
||||
case ET_BULK_OUT:
|
||||
case ET_BULK_IN:
|
||||
xfer->pkts = 0;
|
||||
xfer->iso_xfer = false;
|
||||
xfer->timed_xfer = false;
|
||||
break;
|
||||
case ET_ISO_OUT:
|
||||
case ET_ISO_IN:
|
||||
xfer->pkts = 1;
|
||||
xfer->iso_xfer = true;
|
||||
xfer->timed_xfer = true;
|
||||
mfindex = xhci_mfindex_get(xhci);
|
||||
xhci_calc_iso_kick(xhci, xfer, epctx, mfindex);
|
||||
xhci_check_iso_kick(xhci, xfer, epctx, mfindex);
|
||||
xhci_check_intr_iso_kick(xhci, xfer, epctx, mfindex);
|
||||
if (xfer->running_retry) {
|
||||
return -1;
|
||||
}
|
||||
@@ -1938,13 +1963,18 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
|
||||
|
||||
trace_usb_xhci_xfer_retry(xfer);
|
||||
assert(xfer->running_retry);
|
||||
if (xfer->iso_xfer) {
|
||||
/* retry delayed iso transfer */
|
||||
if (xfer->timed_xfer) {
|
||||
/* time to kick the transfer? */
|
||||
mfindex = xhci_mfindex_get(xhci);
|
||||
xhci_check_iso_kick(xhci, xfer, epctx, mfindex);
|
||||
xhci_check_intr_iso_kick(xhci, xfer, epctx, mfindex);
|
||||
if (xfer->running_retry) {
|
||||
return;
|
||||
}
|
||||
xfer->timed_xfer = 0;
|
||||
xfer->running_retry = 1;
|
||||
}
|
||||
if (xfer->iso_xfer) {
|
||||
/* retry iso transfer */
|
||||
if (xhci_setup_packet(xfer) < 0) {
|
||||
return;
|
||||
}
|
||||
@@ -2030,7 +2060,7 @@ static void xhci_kick_ep(XHCIState *xhci, unsigned int slotid,
|
||||
epctx->next_xfer = (epctx->next_xfer + 1) % TD_QUEUE;
|
||||
ep = xfer->packet.ep;
|
||||
} else {
|
||||
if (!xfer->iso_xfer) {
|
||||
if (!xfer->timed_xfer) {
|
||||
fprintf(stderr, "xhci: error firing data transfer\n");
|
||||
}
|
||||
}
|
||||
@@ -2076,6 +2106,7 @@ static TRBCCode xhci_disable_slot(XHCIState *xhci, unsigned int slotid)
|
||||
|
||||
xhci->slots[slotid-1].enabled = 0;
|
||||
xhci->slots[slotid-1].addressed = 0;
|
||||
xhci->slots[slotid-1].uport = NULL;
|
||||
return CC_SUCCESS;
|
||||
}
|
||||
|
||||
|
@@ -799,8 +799,7 @@ static int virtio_pci_set_guest_notifiers(DeviceState *d, int nvqs, bool assign)
|
||||
break;
|
||||
}
|
||||
|
||||
r = virtio_pci_set_guest_notifier(d, n, assign,
|
||||
kvm_msi_via_irqfd_enabled());
|
||||
r = virtio_pci_set_guest_notifier(d, n, assign, with_irqfd);
|
||||
if (r < 0) {
|
||||
goto assign_error;
|
||||
}
|
||||
|
@@ -377,8 +377,8 @@ void virtqueue_get_avail_bytes(VirtQueue *vq, unsigned int *in_bytes,
|
||||
/* loop over the indirect descriptor table */
|
||||
indirect = 1;
|
||||
max = vring_desc_len(desc_pa, i) / sizeof(VRingDesc);
|
||||
num_bufs = i = 0;
|
||||
desc_pa = vring_desc_addr(desc_pa, i);
|
||||
num_bufs = i = 0;
|
||||
}
|
||||
|
||||
do {
|
||||
|
@@ -45,6 +45,10 @@ typedef struct MemoryRegionPortio {
|
||||
|
||||
#define PORTIO_END_OF_LIST() { }
|
||||
|
||||
#ifndef CONFIG_USER_ONLY
|
||||
extern const MemoryRegionOps unassigned_io_ops;
|
||||
#endif
|
||||
|
||||
void cpu_outb(pio_addr_t addr, uint8_t val);
|
||||
void cpu_outw(pio_addr_t addr, uint16_t val);
|
||||
void cpu_outl(pio_addr_t addr, uint32_t val);
|
||||
|
@@ -106,7 +106,16 @@ PcGuestInfo *pc_guest_info_init(ram_addr_t below_4g_mem_size,
|
||||
#define PCI_HOST_PROP_PCI_HOLE64_START "pci-hole64-start"
|
||||
#define PCI_HOST_PROP_PCI_HOLE64_END "pci-hole64-end"
|
||||
#define PCI_HOST_PROP_PCI_HOLE64_SIZE "pci-hole64-size"
|
||||
#define DEFAULT_PCI_HOLE64_SIZE (1ULL << 31)
|
||||
#define DEFAULT_PCI_HOLE64_SIZE (~0x0ULL)
|
||||
|
||||
static inline uint64_t pci_host_get_hole64_size(uint64_t pci_hole64_size)
|
||||
{
|
||||
if (pci_hole64_size == DEFAULT_PCI_HOLE64_SIZE) {
|
||||
return 1ULL << 62;
|
||||
} else {
|
||||
return pci_hole64_size;
|
||||
}
|
||||
}
|
||||
|
||||
void pc_init_pci64_hole(PcPciInfo *pci_info, uint64_t pci_hole64_start,
|
||||
uint64_t pci_hole64_size);
|
||||
|
@@ -9,6 +9,8 @@
|
||||
#define MAX_SCSI_DEVS 255
|
||||
|
||||
#define SCSI_CMD_BUF_SIZE 16
|
||||
#define SCSI_SENSE_LEN 18
|
||||
#define SCSI_INQUIRY_LEN 36
|
||||
|
||||
typedef struct SCSIBus SCSIBus;
|
||||
typedef struct SCSIBusInfo SCSIBusInfo;
|
||||
|
@@ -123,6 +123,7 @@ typedef struct VirtIOBlock {
|
||||
BlockConf *conf;
|
||||
VirtIOBlkConf blk;
|
||||
unsigned short sector_mask;
|
||||
bool original_wce;
|
||||
VMChangeStateEntry *change;
|
||||
#ifdef CONFIG_VIRTIO_BLK_DATA_PLANE
|
||||
Notifier migration_state_notifier;
|
||||
|
@@ -37,17 +37,15 @@ void xen_cmos_set_s3_resume(void *opaque, int irq, int level);
|
||||
qemu_irq *xen_interrupt_controller_init(void);
|
||||
|
||||
int xen_init(void);
|
||||
int xen_hvm_init(void);
|
||||
int xen_hvm_init(MemoryRegion **ram_memory);
|
||||
void xenstore_store_pv_console_info(int i, struct CharDriverState *chr);
|
||||
|
||||
#if defined(NEED_CPU_H) && !defined(CONFIG_USER_ONLY)
|
||||
struct MemoryRegion;
|
||||
void xen_ram_alloc(ram_addr_t ram_addr, ram_addr_t size,
|
||||
struct MemoryRegion *mr);
|
||||
void xen_modified_memory(ram_addr_t start, ram_addr_t length);
|
||||
#endif
|
||||
|
||||
struct MemoryRegion;
|
||||
void xen_register_framebuffer(struct MemoryRegion *mr);
|
||||
|
||||
#if defined(CONFIG_XEN) && CONFIG_XEN_CTRL_INTERFACE_VERSION < 400
|
||||
|
@@ -152,6 +152,7 @@ struct kvm_run;
|
||||
* @current_tb: Currently executing TB.
|
||||
* @gdb_regs: Additional GDB registers.
|
||||
* @gdb_num_regs: Number of total registers accessible to GDB.
|
||||
* @gdb_num_g_regs: Number of registers in GDB 'g' packets.
|
||||
* @next_cpu: Next CPU sharing TB cache.
|
||||
* @kvm_fd: vCPU file descriptor for KVM.
|
||||
*
|
||||
@@ -188,6 +189,7 @@ struct CPUState {
|
||||
struct TranslationBlock *current_tb;
|
||||
struct GDBRegisterState *gdb_regs;
|
||||
int gdb_num_regs;
|
||||
int gdb_num_g_regs;
|
||||
CPUState *next_cpu;
|
||||
|
||||
int kvm_fd;
|
||||
|
@@ -39,9 +39,11 @@ int vm_stop(RunState state);
|
||||
int vm_stop_force_state(RunState state);
|
||||
|
||||
typedef enum WakeupReason {
|
||||
QEMU_WAKEUP_REASON_OTHER = 0,
|
||||
/* Always keep QEMU_WAKEUP_REASON_NONE = 0 */
|
||||
QEMU_WAKEUP_REASON_NONE = 0,
|
||||
QEMU_WAKEUP_REASON_RTC,
|
||||
QEMU_WAKEUP_REASON_PMTIMER,
|
||||
QEMU_WAKEUP_REASON_OTHER,
|
||||
} WakeupReason;
|
||||
|
||||
void qemu_system_reset_request(void);
|
||||
|
16
ioport.c
16
ioport.c
@@ -44,6 +44,22 @@ typedef struct MemoryRegionPortioList {
|
||||
MemoryRegionPortio ports[];
|
||||
} MemoryRegionPortioList;
|
||||
|
||||
static uint64_t unassigned_io_read(void *opaque, hwaddr addr, unsigned size)
|
||||
{
|
||||
return -1ULL;
|
||||
}
|
||||
|
||||
static void unassigned_io_write(void *opaque, hwaddr addr, uint64_t val,
|
||||
unsigned size)
|
||||
{
|
||||
}
|
||||
|
||||
const MemoryRegionOps unassigned_io_ops = {
|
||||
.read = unassigned_io_read,
|
||||
.write = unassigned_io_write,
|
||||
.endianness = DEVICE_NATIVE_ENDIAN,
|
||||
};
|
||||
|
||||
void cpu_outb(pio_addr_t addr, uint8_t val)
|
||||
{
|
||||
LOG_IOPORT("outb: %04"FMT_pioaddr" %02"PRIx8"\n", addr, val);
|
||||
|
2
memory.c
2
memory.c
@@ -872,7 +872,7 @@ static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
|
||||
if (current_cpu != NULL) {
|
||||
cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
|
||||
}
|
||||
return -1ULL;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void unassigned_mem_write(void *opaque, hwaddr addr,
|
||||
|
@@ -920,9 +920,11 @@ static int qemu_rdma_resolve_host(RDMAContext *rdma, Error **errp)
|
||||
ret = rdma_resolve_addr(rdma->cm_id, NULL, e->ai_dst_addr,
|
||||
RDMA_RESOLVE_TIMEOUT_MS);
|
||||
if (!ret) {
|
||||
ret = qemu_rdma_broken_ipv6_kernel(errp, rdma->cm_id->verbs);
|
||||
if (ret) {
|
||||
continue;
|
||||
if (e->ai_family == AF_INET6) {
|
||||
ret = qemu_rdma_broken_ipv6_kernel(errp, rdma->cm_id->verbs);
|
||||
if (ret) {
|
||||
continue;
|
||||
}
|
||||
}
|
||||
goto route;
|
||||
}
|
||||
|
@@ -44,8 +44,6 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
|
||||
struct stat s;
|
||||
#endif
|
||||
|
||||
#if defined(__FreeBSD__) || defined(__FreeBSD_kernel__) || \
|
||||
defined(__OpenBSD__) || defined(__APPLE__)
|
||||
/* if no ifname is given, always start the search from tap0/tun0. */
|
||||
int i;
|
||||
char dname[100];
|
||||
@@ -76,15 +74,6 @@ int tap_open(char *ifname, int ifname_size, int *vnet_hdr,
|
||||
dname, strerror(errno));
|
||||
return -1;
|
||||
}
|
||||
#else
|
||||
TFR(fd = open("/dev/tap", O_RDWR));
|
||||
if (fd < 0) {
|
||||
fprintf(stderr,
|
||||
"warning: could not open /dev/tap: no virtual network emulation: %s\n",
|
||||
strerror(errno));
|
||||
return -1;
|
||||
}
|
||||
#endif
|
||||
|
||||
#ifdef TAPGIFNAME
|
||||
if (ioctl(fd, TAPGIFNAME, (void *)&ifr) < 0) {
|
||||
|
12
qemu-char.c
12
qemu-char.c
@@ -1026,15 +1026,11 @@ static gboolean pty_chr_timer(gpointer opaque)
|
||||
struct CharDriverState *chr = opaque;
|
||||
PtyCharDriver *s = chr->opaque;
|
||||
|
||||
if (s->connected) {
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Next poll ... */
|
||||
pty_chr_update_read_handler(chr);
|
||||
|
||||
out:
|
||||
s->timer_tag = 0;
|
||||
if (!s->connected) {
|
||||
/* Next poll ... */
|
||||
pty_chr_update_read_handler(chr);
|
||||
}
|
||||
return FALSE;
|
||||
}
|
||||
|
||||
|
@@ -30,15 +30,17 @@ static unsigned int pool_size;
|
||||
|
||||
Coroutine *qemu_coroutine_create(CoroutineEntry *entry)
|
||||
{
|
||||
Coroutine *co;
|
||||
Coroutine *co = NULL;
|
||||
|
||||
qemu_mutex_lock(&pool_lock);
|
||||
co = QSLIST_FIRST(&pool);
|
||||
if (co) {
|
||||
QSLIST_REMOVE_HEAD(&pool, pool_next);
|
||||
pool_size--;
|
||||
if (CONFIG_COROUTINE_POOL) {
|
||||
qemu_mutex_lock(&pool_lock);
|
||||
co = QSLIST_FIRST(&pool);
|
||||
if (co) {
|
||||
QSLIST_REMOVE_HEAD(&pool, pool_next);
|
||||
pool_size--;
|
||||
}
|
||||
qemu_mutex_unlock(&pool_lock);
|
||||
}
|
||||
qemu_mutex_unlock(&pool_lock);
|
||||
|
||||
if (!co) {
|
||||
co = qemu_coroutine_new();
|
||||
@@ -51,15 +53,17 @@ Coroutine *qemu_coroutine_create(CoroutineEntry *entry)
|
||||
|
||||
static void coroutine_delete(Coroutine *co)
|
||||
{
|
||||
qemu_mutex_lock(&pool_lock);
|
||||
if (pool_size < POOL_MAX_SIZE) {
|
||||
QSLIST_INSERT_HEAD(&pool, co, pool_next);
|
||||
co->caller = NULL;
|
||||
pool_size++;
|
||||
if (CONFIG_COROUTINE_POOL) {
|
||||
qemu_mutex_lock(&pool_lock);
|
||||
if (pool_size < POOL_MAX_SIZE) {
|
||||
QSLIST_INSERT_HEAD(&pool, co, pool_next);
|
||||
co->caller = NULL;
|
||||
pool_size++;
|
||||
qemu_mutex_unlock(&pool_lock);
|
||||
return;
|
||||
}
|
||||
qemu_mutex_unlock(&pool_lock);
|
||||
return;
|
||||
}
|
||||
qemu_mutex_unlock(&pool_lock);
|
||||
|
||||
qemu_coroutine_delete(co);
|
||||
}
|
||||
|
16
qemu-img.c
16
qemu-img.c
@@ -1485,8 +1485,15 @@ static int img_convert(int argc, char **argv)
|
||||
are present in both the output's and input's base images (no
|
||||
need to copy them). */
|
||||
if (out_baseimg) {
|
||||
if (!bdrv_is_allocated(bs[bs_i], sector_num - bs_offset,
|
||||
n, &n1)) {
|
||||
ret = bdrv_is_allocated(bs[bs_i], sector_num - bs_offset,
|
||||
n, &n1);
|
||||
if (ret < 0) {
|
||||
error_report("error while reading metadata for sector "
|
||||
"%" PRId64 ": %s",
|
||||
sector_num - bs_offset, strerror(-ret));
|
||||
goto out;
|
||||
}
|
||||
if (!ret) {
|
||||
sector_num += n1;
|
||||
continue;
|
||||
}
|
||||
@@ -2076,6 +2083,11 @@ static int img_rebase(int argc, char **argv)
|
||||
|
||||
/* If the cluster is allocated, we don't need to take action */
|
||||
ret = bdrv_is_allocated(bs, sector, n, &n);
|
||||
if (ret < 0) {
|
||||
error_report("error while reading image metadata: %s",
|
||||
strerror(-ret));
|
||||
goto out;
|
||||
}
|
||||
if (ret) {
|
||||
continue;
|
||||
}
|
||||
|
@@ -1829,6 +1829,10 @@ static int alloc_f(BlockDriverState *bs, int argc, char **argv)
|
||||
sector_num = offset >> 9;
|
||||
while (remaining) {
|
||||
ret = bdrv_is_allocated(bs, sector_num, remaining, &num);
|
||||
if (ret < 0) {
|
||||
printf("is_allocated failed: %s\n", strerror(-ret));
|
||||
return 0;
|
||||
}
|
||||
sector_num += num;
|
||||
remaining -= num;
|
||||
if (ret) {
|
||||
|
@@ -240,7 +240,7 @@ static void cpu_common_initfn(Object *obj)
|
||||
CPUState *cpu = CPU(obj);
|
||||
CPUClass *cc = CPU_GET_CLASS(obj);
|
||||
|
||||
cpu->gdb_num_regs = cc->gdb_num_core_regs;
|
||||
cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
|
||||
}
|
||||
|
||||
static int64_t cpu_common_get_arch_id(CPUState *cpu)
|
||||
|
@@ -51,7 +51,10 @@ def generate_fwd_enum_struct(name, members):
|
||||
return mcgen('''
|
||||
typedef struct %(name)sList
|
||||
{
|
||||
%(name)s value;
|
||||
union {
|
||||
%(name)s value;
|
||||
uint64_t padding;
|
||||
};
|
||||
struct %(name)sList *next;
|
||||
} %(name)sList;
|
||||
''',
|
||||
|
@@ -161,7 +161,7 @@ class QAPISchema:
|
||||
def parse_schema(fp):
|
||||
try:
|
||||
schema = QAPISchema(fp)
|
||||
except QAPISchemaError as e:
|
||||
except QAPISchemaError, e:
|
||||
print >>sys.stderr, e
|
||||
exit(1)
|
||||
|
||||
|
@@ -894,7 +894,10 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
|
||||
uint32_t page_offset;
|
||||
int page_size;
|
||||
|
||||
if (env->cr[4] & CR4_PAE_MASK) {
|
||||
if (!(env->cr[0] & CR0_PG_MASK)) {
|
||||
pte = addr & env->a20_mask;
|
||||
page_size = 4096;
|
||||
} else if (env->cr[4] & CR4_PAE_MASK) {
|
||||
target_ulong pdpe_addr;
|
||||
uint64_t pde, pdpe;
|
||||
|
||||
@@ -952,26 +955,21 @@ hwaddr x86_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
|
||||
} else {
|
||||
uint32_t pde;
|
||||
|
||||
if (!(env->cr[0] & CR0_PG_MASK)) {
|
||||
pte = addr;
|
||||
page_size = 4096;
|
||||
/* page directory entry */
|
||||
pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & env->a20_mask;
|
||||
pde = ldl_phys(pde_addr);
|
||||
if (!(pde & PG_PRESENT_MASK))
|
||||
return -1;
|
||||
if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
|
||||
pte = pde & ~0x003ff000; /* align to 4MB */
|
||||
page_size = 4096 * 1024;
|
||||
} else {
|
||||
/* page directory entry */
|
||||
pde_addr = ((env->cr[3] & ~0xfff) + ((addr >> 20) & 0xffc)) & env->a20_mask;
|
||||
pde = ldl_phys(pde_addr);
|
||||
if (!(pde & PG_PRESENT_MASK))
|
||||
pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask;
|
||||
pte = ldl_phys(pte_addr);
|
||||
if (!(pte & PG_PRESENT_MASK))
|
||||
return -1;
|
||||
if ((pde & PG_PSE_MASK) && (env->cr[4] & CR4_PSE_MASK)) {
|
||||
pte = pde & ~0x003ff000; /* align to 4MB */
|
||||
page_size = 4096 * 1024;
|
||||
} else {
|
||||
/* page directory entry */
|
||||
pte_addr = ((pde & ~0xfff) + ((addr >> 10) & 0xffc)) & env->a20_mask;
|
||||
pte = ldl_phys(pte_addr);
|
||||
if (!(pte & PG_PRESENT_MASK))
|
||||
return -1;
|
||||
page_size = 4096;
|
||||
}
|
||||
page_size = 4096;
|
||||
}
|
||||
pte = pte & env->a20_mask;
|
||||
}
|
||||
|
@@ -428,9 +428,9 @@ EXTRACT_HELPER(CRM, 12, 8);
|
||||
EXTRACT_HELPER(SR, 16, 4);
|
||||
|
||||
/* mtfsf/mtfsfi */
|
||||
EXTRACT_HELPER(FPBF, 19, 3);
|
||||
EXTRACT_HELPER(FPBF, 23, 3);
|
||||
EXTRACT_HELPER(FPIMM, 12, 4);
|
||||
EXTRACT_HELPER(FPL, 21, 1);
|
||||
EXTRACT_HELPER(FPL, 25, 1);
|
||||
EXTRACT_HELPER(FPFLM, 17, 8);
|
||||
EXTRACT_HELPER(FPW, 16, 1);
|
||||
|
||||
|
12
tci.c
12
tci.c
@@ -1085,7 +1085,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
tmp8 = helper_ldb_mmu(env, taddr, tci_read_i(&tb_ptr));
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
tmp8 = *(uint8_t *)(host_addr + GUEST_BASE);
|
||||
#endif
|
||||
tci_write_reg8(t0, tmp8);
|
||||
@@ -1097,7 +1096,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
tmp8 = helper_ldb_mmu(env, taddr, tci_read_i(&tb_ptr));
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
tmp8 = *(uint8_t *)(host_addr + GUEST_BASE);
|
||||
#endif
|
||||
tci_write_reg8s(t0, tmp8);
|
||||
@@ -1109,7 +1107,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
tmp16 = helper_ldw_mmu(env, taddr, tci_read_i(&tb_ptr));
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
tmp16 = tswap16(*(uint16_t *)(host_addr + GUEST_BASE));
|
||||
#endif
|
||||
tci_write_reg16(t0, tmp16);
|
||||
@@ -1121,7 +1118,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
tmp16 = helper_ldw_mmu(env, taddr, tci_read_i(&tb_ptr));
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
tmp16 = tswap16(*(uint16_t *)(host_addr + GUEST_BASE));
|
||||
#endif
|
||||
tci_write_reg16s(t0, tmp16);
|
||||
@@ -1134,7 +1130,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
tmp32 = helper_ldl_mmu(env, taddr, tci_read_i(&tb_ptr));
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
tmp32 = tswap32(*(uint32_t *)(host_addr + GUEST_BASE));
|
||||
#endif
|
||||
tci_write_reg32(t0, tmp32);
|
||||
@@ -1146,7 +1141,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
tmp32 = helper_ldl_mmu(env, taddr, tci_read_i(&tb_ptr));
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
tmp32 = tswap32(*(uint32_t *)(host_addr + GUEST_BASE));
|
||||
#endif
|
||||
tci_write_reg32s(t0, tmp32);
|
||||
@@ -1159,7 +1153,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
tmp32 = helper_ldl_mmu(env, taddr, tci_read_i(&tb_ptr));
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
tmp32 = tswap32(*(uint32_t *)(host_addr + GUEST_BASE));
|
||||
#endif
|
||||
tci_write_reg32(t0, tmp32);
|
||||
@@ -1174,7 +1167,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
tmp64 = helper_ldq_mmu(env, taddr, tci_read_i(&tb_ptr));
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
tmp64 = tswap64(*(uint64_t *)(host_addr + GUEST_BASE));
|
||||
#endif
|
||||
tci_write_reg(t0, tmp64);
|
||||
@@ -1190,7 +1182,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
helper_stb_mmu(env, taddr, t0, t2);
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
*(uint8_t *)(host_addr + GUEST_BASE) = t0;
|
||||
#endif
|
||||
break;
|
||||
@@ -1202,7 +1193,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
helper_stw_mmu(env, taddr, t0, t2);
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
*(uint16_t *)(host_addr + GUEST_BASE) = tswap16(t0);
|
||||
#endif
|
||||
break;
|
||||
@@ -1214,7 +1204,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
helper_stl_mmu(env, taddr, t0, t2);
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
*(uint32_t *)(host_addr + GUEST_BASE) = tswap32(t0);
|
||||
#endif
|
||||
break;
|
||||
@@ -1226,7 +1215,6 @@ tcg_target_ulong tcg_qemu_tb_exec(CPUArchState *env, uint8_t *tb_ptr)
|
||||
helper_stq_mmu(env, taddr, tmp64, t2);
|
||||
#else
|
||||
host_addr = (tcg_target_ulong)taddr;
|
||||
assert(taddr == host_addr);
|
||||
*(uint64_t *)(host_addr + GUEST_BASE) = tswap64(tmp64);
|
||||
#endif
|
||||
break;
|
||||
|
10
util/iov.c
10
util/iov.c
@@ -181,13 +181,11 @@ ssize_t iov_send_recv(int sockfd, struct iovec *iov, unsigned iov_cnt,
|
||||
assert(iov[niov].iov_len > tail);
|
||||
orig_len = iov[niov].iov_len;
|
||||
iov[niov++].iov_len = tail;
|
||||
}
|
||||
|
||||
ret = do_send_recv(sockfd, iov, niov, do_send);
|
||||
|
||||
/* Undo the changes above before checking for errors */
|
||||
if (tail) {
|
||||
ret = do_send_recv(sockfd, iov, niov, do_send);
|
||||
/* Undo the changes above before checking for errors */
|
||||
iov[niov-1].iov_len = orig_len;
|
||||
} else {
|
||||
ret = do_send_recv(sockfd, iov, niov, do_send);
|
||||
}
|
||||
if (offset) {
|
||||
iov[0].iov_base -= offset;
|
||||
|
15
vl.c
15
vl.c
@@ -1792,14 +1792,14 @@ static pid_t shutdown_pid;
|
||||
static int powerdown_requested;
|
||||
static int debug_requested;
|
||||
static int suspend_requested;
|
||||
static int wakeup_requested;
|
||||
static WakeupReason wakeup_reason;
|
||||
static NotifierList powerdown_notifiers =
|
||||
NOTIFIER_LIST_INITIALIZER(powerdown_notifiers);
|
||||
static NotifierList suspend_notifiers =
|
||||
NOTIFIER_LIST_INITIALIZER(suspend_notifiers);
|
||||
static NotifierList wakeup_notifiers =
|
||||
NOTIFIER_LIST_INITIALIZER(wakeup_notifiers);
|
||||
static uint32_t wakeup_reason_mask = ~0;
|
||||
static uint32_t wakeup_reason_mask = ~(1 << QEMU_WAKEUP_REASON_NONE);
|
||||
static RunState vmstop_requested = RUN_STATE_MAX;
|
||||
|
||||
int qemu_shutdown_requested_get(void)
|
||||
@@ -1849,11 +1849,9 @@ static int qemu_suspend_requested(void)
|
||||
return r;
|
||||
}
|
||||
|
||||
static int qemu_wakeup_requested(void)
|
||||
static WakeupReason qemu_wakeup_requested(void)
|
||||
{
|
||||
int r = wakeup_requested;
|
||||
wakeup_requested = 0;
|
||||
return r;
|
||||
return wakeup_reason;
|
||||
}
|
||||
|
||||
static int qemu_powerdown_requested(void)
|
||||
@@ -1970,8 +1968,7 @@ void qemu_system_wakeup_request(WakeupReason reason)
|
||||
return;
|
||||
}
|
||||
runstate_set(RUN_STATE_RUNNING);
|
||||
notifier_list_notify(&wakeup_notifiers, &reason);
|
||||
wakeup_requested = 1;
|
||||
wakeup_reason = reason;
|
||||
qemu_notify_event();
|
||||
}
|
||||
|
||||
@@ -2063,6 +2060,8 @@ static bool main_loop_should_exit(void)
|
||||
pause_all_vcpus();
|
||||
cpu_synchronize_all_states();
|
||||
qemu_system_reset(VMRESET_SILENT);
|
||||
notifier_list_notify(&wakeup_notifiers, &wakeup_reason);
|
||||
wakeup_reason = QEMU_WAKEUP_REASON_NONE;
|
||||
resume_all_vcpus();
|
||||
monitor_protocol_event(QEVENT_WAKEUP, NULL);
|
||||
}
|
||||
|
16
xen-all.c
16
xen-all.c
@@ -98,6 +98,7 @@ typedef struct XenIOState {
|
||||
|
||||
Notifier exit;
|
||||
Notifier suspend;
|
||||
Notifier wakeup;
|
||||
} XenIOState;
|
||||
|
||||
/* Xen specific function for piix pci */
|
||||
@@ -154,7 +155,7 @@ qemu_irq *xen_interrupt_controller_init(void)
|
||||
|
||||
/* Memory Ops */
|
||||
|
||||
static void xen_ram_init(ram_addr_t ram_size)
|
||||
static void xen_ram_init(ram_addr_t ram_size, MemoryRegion **ram_memory_p)
|
||||
{
|
||||
MemoryRegion *sysmem = get_system_memory();
|
||||
ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
|
||||
@@ -168,6 +169,7 @@ static void xen_ram_init(ram_addr_t ram_size)
|
||||
block_len += HVM_BELOW_4G_MMIO_LENGTH;
|
||||
}
|
||||
memory_region_init_ram(&ram_memory, NULL, "xen.ram", block_len);
|
||||
*ram_memory_p = &ram_memory;
|
||||
vmstate_register_ram_global(&ram_memory);
|
||||
|
||||
if (ram_size >= HVM_BELOW_4G_RAM_END) {
|
||||
@@ -1059,7 +1061,12 @@ static void xen_read_physmap(XenIOState *state)
|
||||
free(entries);
|
||||
}
|
||||
|
||||
int xen_hvm_init(void)
|
||||
static void xen_wakeup_notifier(Notifier *notifier, void *data)
|
||||
{
|
||||
xc_set_hvm_param(xen_xc, xen_domid, HVM_PARAM_ACPI_S_STATE, 0);
|
||||
}
|
||||
|
||||
int xen_hvm_init(MemoryRegion **ram_memory)
|
||||
{
|
||||
int i, rc;
|
||||
unsigned long ioreq_pfn;
|
||||
@@ -1088,6 +1095,9 @@ int xen_hvm_init(void)
|
||||
state->suspend.notify = xen_suspend_notifier;
|
||||
qemu_register_suspend_notifier(&state->suspend);
|
||||
|
||||
state->wakeup.notify = xen_wakeup_notifier;
|
||||
qemu_register_wakeup_notifier(&state->wakeup);
|
||||
|
||||
xc_get_hvm_param(xen_xc, xen_domid, HVM_PARAM_IOREQ_PFN, &ioreq_pfn);
|
||||
DPRINTF("shared page at pfn %lx\n", ioreq_pfn);
|
||||
state->shared_page = xc_map_foreign_range(xen_xc, xen_domid, XC_PAGE_SIZE,
|
||||
@@ -1134,7 +1144,7 @@ int xen_hvm_init(void)
|
||||
|
||||
/* Init RAM management */
|
||||
xen_map_cache_init(xen_phys_offset_to_gaddr, state);
|
||||
xen_ram_init(ram_size);
|
||||
xen_ram_init(ram_size, ram_memory);
|
||||
|
||||
qemu_add_vm_change_state_handler(xen_hvm_change_state_handler, state);
|
||||
|
||||
|
@@ -64,7 +64,7 @@ void xen_modified_memory(ram_addr_t start, ram_addr_t length)
|
||||
{
|
||||
}
|
||||
|
||||
int xen_hvm_init(void)
|
||||
int xen_hvm_init(MemoryRegion **ram_memory)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
Reference in New Issue
Block a user