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Accepting request 76538 from home:a_jaeger:branches:openSUSE:Factory

Browse Source 
Update crypt_blowfish.

OBS-URL: https://build.opensuse.org/request/show/76538
OBS-URL: https://build.opensuse.org/package/show/Base:System/glibc?expand=0&rev=82
This commit is contained in:
Andreas Jaeger 2011-07-20 12:59:52 +00:00 committed by Git OBS Bridge
parent 90eb33f2d4
commit ffd957a31e
4 changed files with 77 additions and 503 deletions
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156
glibc-2.2-sunrpc.diff
View File

@ -1,104 +1,80 @@
For details see:
http://sourceware.org/bugzilla/show_bug.cgi?id=5379
--- sunrpc/clnt_udp.c.orig 2008-10-10 14:42:04.000000000 -0400
+++ sunrpc/clnt_udp.c 2008-10-10 16:15:33.000000000 -0400
@@ -38,6 +38,7 @@
*/
#include <stdio.h>
+#include <stdint.h>
#include <unistd.h>
#include <libintl.h>
#include <rpc/rpc.h>
@@ -266,8 +267,7 @@
Index: sunrpc/clnt_udp.c
===================================================================
--- sunrpc/clnt_udp.c.orig
+++ sunrpc/clnt_udp.c
@@ -301,6 +301,7 @@ clntudp_call (cl, proc, xargs, argsp, xr
XDR *xdrs;
int outlen = 0;
int inlen;
+ int pollresult;
socklen_t fromlen;
struct pollfd fd;
- int milliseconds = (cu->cu_wait.tv_sec * 1000) +
- (cu->cu_wait.tv_usec / 1000);
+ int milliseconds;
struct sockaddr_in from;
struct rpc_msg reply_msg;
XDR reply_xdrs;
@@ -275,6 +275,8 @@
bool_t ok;
int nrefreshes = 2; /* number of times to refresh cred */
struct timeval timeout;
+ uint64_t start_time, end_time;
+ struct timeval tmp_tv;
int anyup; /* any network interface up */
if (cu->cu_total.tv_usec == -1)
@@ -332,6 +334,18 @@
fd.fd = cu->cu_sock;
fd.events = POLLIN;
int milliseconds = (cu->cu_wait.tv_sec * 1000) +
@@ -371,37 +372,36 @@ send_again:
anyup = 0;
+
+ poll_again:
+ milliseconds = (cu->cu_wait.tv_sec * 1000) +
+ (cu->cu_wait.tv_usec / 1000);
+ if (gettimeofday(&tmp_tv, NULL) != 0)
+ {
+ /* XXX: What is the correct return here? */
+ return (cu->cu_error.re_status = RPC_CANTRECV);
+ }
+ start_time = (uint64_t)tmp_tv.tv_sec * 1000 +
+ (uint64_t)tmp_tv.tv_usec / 1000;
+
for (;;)
{
switch (__poll (&fd, 1, milliseconds))
@@ -364,7 +378,28 @@
*/
case -1:
if (errno == EINTR)
- continue;
+ {
+ /* Decrement time already spent polling. */
+ if (gettimeofday(&tmp_tv, NULL) != 0)
+ {
+ return (cu->cu_error.re_status = RPC_CANTRECV);
+ }
+
+ end_time = (uint64_t)tmp_tv.tv_sec * 1000 +
+ (uint64_t)tmp_tv.tv_usec / 1000;
+
+ if ((end_time - start_time) > (uint64_t)milliseconds)
+ {
+ milliseconds = 0;
+ }
+ else
+ {
+ milliseconds -= (int)(end_time - start_time);
+ }
+ start_time = end_time;
+
+ continue;
+ }
cu->cu_error.re_errno = errno;
return (cu->cu_error.re_status = RPC_CANTRECV);
}
@@ -420,19 +455,19 @@
if (inlen < 0)
- switch (__poll (&fd, 1, milliseconds))
+ switch (pollresult = __poll (&fd, 1, milliseconds))
{
if (errno == EWOULDBLOCK)
-
case 0:
- if (anyup == 0)
- {
- anyup = is_network_up (cu->cu_sock);
- if (!anyup)
- return (cu->cu_error.re_status = RPC_CANTRECV);
- }
-
- time_waited.tv_sec += cu->cu_wait.tv_sec;
- time_waited.tv_usec += cu->cu_wait.tv_usec;
- while (time_waited.tv_usec >= 1000000)
- {
- time_waited.tv_sec++;
- time_waited.tv_usec -= 1000000;
- }
- if ((time_waited.tv_sec < timeout.tv_sec) ||
- ((time_waited.tv_sec == timeout.tv_sec) &&
- (time_waited.tv_usec < timeout.tv_usec)))
- goto send_again;
- return (cu->cu_error.re_status = RPC_TIMEDOUT);
-
- /*
- * buggy in other cases because time_waited is not being
- * updated.
- */
case -1:
- if (errno == EINTR)
- continue;
+ goto poll_again;
+ if (pollresult == 0 || errno == EINTR) {
+ if (anyup == 0)
+ {
+ anyup = is_network_up (cu->cu_sock);
+ if (!anyup)
+ return (cu->cu_error.re_status = RPC_CANTRECV);
+ }
+
+ time_waited.tv_sec += cu->cu_wait.tv_sec;
+ time_waited.tv_usec += cu->cu_wait.tv_usec;
+ while (time_waited.tv_usec >= 1000000)
+ {
+ time_waited.tv_sec++;
+ time_waited.tv_usec -= 1000000;
+ }
+ if ((time_waited.tv_sec < timeout.tv_sec) ||
+ ((time_waited.tv_sec == timeout.tv_sec) &&
+ (time_waited.tv_usec < timeout.tv_usec)))
+ if (pollresult == 0)
+ goto send_again;
+ else
+ continue;
+ return (cu->cu_error.re_status = RPC_TIMEDOUT);
+ }
+
+ /* errno != EINTR */
cu->cu_error.re_errno = errno;
return (cu->cu_error.re_status = RPC_CANTRECV);
}
if (inlen < 4)
- continue;
+ goto poll_again;
/* see if reply transaction id matches sent id.
Don't do this if we only wait for a replay */
if (xargs != NULL
&& (*((u_int32_t *) (cu->cu_inbuf))
!= *((u_int32_t *) (cu->cu_outbuf))))
- continue;
+ goto poll_again;
/* we now assume we have the proper reply */
break;
}

11
glibc.changes
View File

@ -1,3 +1,8 @@
-------------------------------------------------------------------
Tue Jul 19 12:19:22 UTC 2011 - aj@suse.de
- Back to old glibc-2.2-sunrpc.diff for now.
-------------------------------------------------------------------
Tue Jul 19 08:41:55 UTC 2011 - lnussel@suse.de
@ -6,6 +11,12 @@ Tue Jul 19 08:41:55 UTC 2011 - lnussel@suse.de
previous versions if the password contains 8bit chracters!
* libcrypt now exports crypt_gensalt
-------------------------------------------------------------------
Tue Jul 12 14:21:29 UTC 2011 - aj@suse.de
- Remove ppc-atomic.diff after discussion with glibc PPC experts
since it does not bring any real benefit.
-------------------------------------------------------------------
Thu Jul 7 14:50:15 UTC 2011 - aj@suse.de

3
glibc.spec
View File

@ -156,8 +156,6 @@ Patch29: glibc-2.8-getconf.diff
# PATCH-FIX-OPENSUSE only use ipv6 if real ipv6 address exists bnc#361697, bnc#684534
Patch30: getaddrinfo-ipv6-sanity.diff
# PATCH-MISSING-TAG -- See http://en.opensuse.org/openSUSE:Packaging_Patches_guidelines
Patch31: ppc-atomic.diff
# PATCH-MISSING-TAG -- See http://en.opensuse.org/openSUSE:Packaging_Patches_guidelines
Patch33: glibc-compiled-binaries.diff
# PATCH-MISSING-TAG -- See http://en.opensuse.org/openSUSE:Packaging_Patches_guidelines
Patch36: glibc-no-unwind-tables.diff
@ -417,7 +415,6 @@ rm nscd/s-stamp
%patch28
%patch29
%patch30
%patch31
%patch33
%patch36
# Disable for now

410
ppc-atomic.diff
View File

@ -1,410 +0,0 @@
Index: sysdeps/powerpc/bits/atomic.h
===================================================================
--- sysdeps/powerpc/bits/atomic.h.orig
+++ sysdeps/powerpc/bits/atomic.h
@@ -85,14 +85,14 @@ typedef uintmax_t uatomic_max_t;
__typeof (*(mem)) __tmp; \
__typeof (mem) __memp = (mem); \
__asm __volatile ( \
- "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
+ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
" cmpw %0,%2\n" \
" bne 2f\n" \
- " stwcx. %3,0,%1\n" \
+ " stwcx. %3,%y1\n" \
" bne- 1b\n" \
"2: " __ARCH_ACQ_INSTR \
- : "=&r" (__tmp) \
- : "b" (__memp), "r" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "+Z" (*__memp) \
+ : "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp; \
})
@@ -102,14 +102,14 @@ typedef uintmax_t uatomic_max_t;
__typeof (*(mem)) __tmp; \
__typeof (mem) __memp = (mem); \
__asm __volatile (__ARCH_REL_INSTR "\n" \
- "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
+ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
" cmpw %0,%2\n" \
" bne 2f\n" \
- " stwcx. %3,0,%1\n" \
+ " stwcx. %3,%y1\n" \
" bne- 1b\n" \
"2: " \
- : "=&r" (__tmp) \
- : "b" (__memp), "r" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "+Z" (__memp) \
+ : "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp; \
})
@@ -118,12 +118,12 @@ typedef uintmax_t uatomic_max_t;
({ \
__typeof (*mem) __val; \
__asm __volatile ( \
- "1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
- " stwcx. %3,0,%2\n" \
+ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
+ " stwcx. %2,%y1\n" \
" bne- 1b\n" \
" " __ARCH_ACQ_INSTR \
- : "=&r" (__val), "=m" (*mem) \
- : "b" (mem), "r" (value), "m" (*mem) \
+ : "=&r" (__val), "+Z" (*mem) \
+ : "r" (value) \
: "cr0", "memory"); \
__val; \
})
@@ -132,11 +132,11 @@ typedef uintmax_t uatomic_max_t;
({ \
__typeof (*mem) __val; \
__asm __volatile (__ARCH_REL_INSTR "\n" \
- "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
- " stwcx. %3,0,%2\n" \
+ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
+ " stwcx. %2,%y1\n" \
" bne- 1b" \
- : "=&r" (__val), "=m" (*mem) \
- : "b" (mem), "r" (value), "m" (*mem) \
+ : "=&r" (__val), "+Z" (*mem) \
+ : "r" (value) \
: "cr0", "memory"); \
__val; \
})
@@ -144,12 +144,12 @@ typedef uintmax_t uatomic_max_t;
#define __arch_atomic_exchange_and_add_32(mem, value) \
({ \
__typeof (*mem) __val, __tmp; \
- __asm __volatile ("1: lwarx %0,0,%3\n" \
- " add %1,%0,%4\n" \
- " stwcx. %1,0,%3\n" \
+ __asm __volatile ("1: lwarx %0,%y2\n" \
+ " add %1,%0,%3\n" \
+ " stwcx. %1,%y2\n" \
" bne- 1b" \
- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
- : "b" (mem), "r" (value), "m" (*mem) \
+ : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem) \
+ : "r" (value) \
: "cr0", "memory"); \
__val; \
})
@@ -157,12 +157,12 @@ typedef uintmax_t uatomic_max_t;
#define __arch_atomic_increment_val_32(mem) \
({ \
__typeof (*(mem)) __val; \
- __asm __volatile ("1: lwarx %0,0,%2\n" \
+ __asm __volatile ("1: lwarx %0,%y1\n" \
" addi %0,%0,1\n" \
- " stwcx. %0,0,%2\n" \
+ " stwcx. %0,%y1\n" \
" bne- 1b" \
- : "=&b" (__val), "=m" (*mem) \
- : "b" (mem), "m" (*mem) \
+ : "=&b" (__val), "+Z" (*mem) \
+ : \
: "cr0", "memory"); \
__val; \
})
@@ -170,27 +170,27 @@ typedef uintmax_t uatomic_max_t;
#define __arch_atomic_decrement_val_32(mem) \
({ \
__typeof (*(mem)) __val; \
- __asm __volatile ("1: lwarx %0,0,%2\n" \
+ __asm __volatile ("1: lwarx %0,%y1\n" \
" subi %0,%0,1\n" \
- " stwcx. %0,0,%2\n" \
+ " stwcx. %0,%y1\n" \
" bne- 1b" \
- : "=&b" (__val), "=m" (*mem) \
- : "b" (mem), "m" (*mem) \
+ : "=&b" (__val), "+Z" (*mem) \
+ : \
: "cr0", "memory"); \
__val; \
})
#define __arch_atomic_decrement_if_positive_32(mem) \
({ int __val, __tmp; \
- __asm __volatile ("1: lwarx %0,0,%3\n" \
+ __asm __volatile ("1: lwarx %0,%y2\n" \
" cmpwi 0,%0,0\n" \
" addi %1,%0,-1\n" \
" ble 2f\n" \
- " stwcx. %1,0,%3\n" \
+ " stwcx. %1,%y2\n" \
" bne- 1b\n" \
"2: " __ARCH_ACQ_INSTR \
- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
- : "b" (mem), "m" (*mem) \
+ : "=&b" (__val), "=&r" (__tmp), "+Z" (*mem) \
+ : \
: "cr0", "memory"); \
__val; \
})
Index: sysdeps/powerpc/powerpc32/bits/atomic.h
===================================================================
--- sysdeps/powerpc/powerpc32/bits/atomic.h.orig
+++ sysdeps/powerpc/powerpc32/bits/atomic.h
@@ -44,14 +44,14 @@
({ \
unsigned int __tmp; \
__asm __volatile ( \
- "1: lwarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
+ "1: lwarx %0,%y1" MUTEX_HINT_ACQ "\n" \
" subf. %0,%2,%0\n" \
" bne 2f\n" \
- " stwcx. %3,0,%1\n" \
+ " stwcx. %3,%y1\n" \
" bne- 1b\n" \
"2: " __ARCH_ACQ_INSTR \
- : "=&r" (__tmp) \
- : "b" (mem), "r" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "+Z" (*(mem)) \
+ : "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp != 0; \
})
@@ -60,14 +60,14 @@
({ \
unsigned int __tmp; \
__asm __volatile (__ARCH_REL_INSTR "\n" \
- "1: lwarx %0,0,%1" MUTEX_HINT_REL "\n" \
+ "1: lwarx %0,%y1" MUTEX_HINT_REL "\n" \
" subf. %0,%2,%0\n" \
" bne 2f\n" \
- " stwcx. %3,0,%1\n" \
+ " stwcx. %3,%y1\n" \
" bne- 1b\n" \
"2: " \
- : "=&r" (__tmp) \
- : "b" (mem), "r" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "+Z" (*(mem)) \
+ : "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp != 0; \
})
Index: sysdeps/powerpc/powerpc64/bits/atomic.h
===================================================================
--- sysdeps/powerpc/powerpc64/bits/atomic.h.orig
+++ sysdeps/powerpc/powerpc64/bits/atomic.h
@@ -44,14 +44,14 @@
({ \
unsigned int __tmp, __tmp2; \
__asm __volatile (" clrldi %1,%1,32\n" \
- "1: lwarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
+ "1: lwarx %0,%y2" MUTEX_HINT_ACQ "\n" \
" subf. %0,%1,%0\n" \
" bne 2f\n" \
- " stwcx. %4,0,%2\n" \
+ " stwcx. %4,%y2\n" \
" bne- 1b\n" \
"2: " __ARCH_ACQ_INSTR \
- : "=&r" (__tmp), "=r" (__tmp2) \
- : "b" (mem), "1" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem)) \
+ : "1" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp != 0; \
})
@@ -61,14 +61,14 @@
unsigned int __tmp, __tmp2; \
__asm __volatile (__ARCH_REL_INSTR "\n" \
" clrldi %1,%1,32\n" \
- "1: lwarx %0,0,%2" MUTEX_HINT_REL "\n" \
+ "1: lwarx %0,%y2" MUTEX_HINT_REL "\n" \
" subf. %0,%1,%0\n" \
" bne 2f\n" \
- " stwcx. %4,0,%2\n" \
+ " stwcx. %4,%y2\n" \
" bne- 1b\n" \
"2: " \
- : "=&r" (__tmp), "=r" (__tmp2) \
- : "b" (mem), "1" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "=r" (__tmp2), "+Z" (*(mem)) \
+ : "1" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp != 0; \
})
@@ -82,14 +82,14 @@
({ \
unsigned long __tmp; \
__asm __volatile ( \
- "1: ldarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
+ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
" subf. %0,%2,%0\n" \
" bne 2f\n" \
- " stdcx. %3,0,%1\n" \
+ " stdcx. %3,%y1\n" \
" bne- 1b\n" \
"2: " __ARCH_ACQ_INSTR \
- : "=&r" (__tmp) \
- : "b" (mem), "r" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "+Z" (*(mem)) \
+ : "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp != 0; \
})
@@ -98,14 +98,14 @@
({ \
unsigned long __tmp; \
__asm __volatile (__ARCH_REL_INSTR "\n" \
- "1: ldarx %0,0,%2" MUTEX_HINT_REL "\n" \
+ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
" subf. %0,%2,%0\n" \
" bne 2f\n" \
- " stdcx. %3,0,%1\n" \
+ " stdcx. %3,%y1\n" \
" bne- 1b\n" \
"2: " \
- : "=&r" (__tmp) \
- : "b" (mem), "r" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "+Z" (*(mem)) \
+ : "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp != 0; \
})
@@ -115,14 +115,14 @@
__typeof (*(mem)) __tmp; \
__typeof (mem) __memp = (mem); \
__asm __volatile ( \
- "1: ldarx %0,0,%1" MUTEX_HINT_ACQ "\n" \
+ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
" cmpd %0,%2\n" \
" bne 2f\n" \
- " stdcx. %3,0,%1\n" \
+ " stdcx. %3,%y1\n" \
" bne- 1b\n" \
"2: " __ARCH_ACQ_INSTR \
- : "=&r" (__tmp) \
- : "b" (__memp), "r" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "+Z" (*__memp) \
+ : "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp; \
})
@@ -132,14 +132,14 @@
__typeof (*(mem)) __tmp; \
__typeof (mem) __memp = (mem); \
__asm __volatile (__ARCH_REL_INSTR "\n" \
- "1: ldarx %0,0,%1" MUTEX_HINT_REL "\n" \
+ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
" cmpd %0,%2\n" \
" bne 2f\n" \
- " stdcx. %3,0,%1\n" \
+ " stdcx. %3,%y1\n" \
" bne- 1b\n" \
"2: " \
- : "=&r" (__tmp) \
- : "b" (__memp), "r" (oldval), "r" (newval) \
+ : "=&r" (__tmp), "+Z" (*__memp) \
+ : "r" (oldval), "r" (newval) \
: "cr0", "memory"); \
__tmp; \
})
@@ -148,12 +148,12 @@
({ \
__typeof (*mem) __val; \
__asm __volatile (__ARCH_REL_INSTR "\n" \
- "1: ldarx %0,0,%2" MUTEX_HINT_ACQ "\n" \
- " stdcx. %3,0,%2\n" \
+ "1: ldarx %0,%y1" MUTEX_HINT_ACQ "\n" \
+ " stdcx. %2,%y1\n" \
" bne- 1b\n" \
" " __ARCH_ACQ_INSTR \
- : "=&r" (__val), "=m" (*mem) \
- : "b" (mem), "r" (value), "m" (*mem) \
+ : "=&r" (__val), "+Z" (*(mem)) \
+ : "r" (value) \
: "cr0", "memory"); \
__val; \
})
@@ -162,11 +162,11 @@
({ \
__typeof (*mem) __val; \
__asm __volatile (__ARCH_REL_INSTR "\n" \
- "1: ldarx %0,0,%2" MUTEX_HINT_REL "\n" \
- " stdcx. %3,0,%2\n" \
+ "1: ldarx %0,%y1" MUTEX_HINT_REL "\n" \
+ " stdcx. %2,%y1\n" \
" bne- 1b" \
- : "=&r" (__val), "=m" (*mem) \
- : "b" (mem), "r" (value), "m" (*mem) \
+ : "=&r" (__val), "+Z" (*(mem)) \
+ : "r" (value) \
: "cr0", "memory"); \
__val; \
})
@@ -174,12 +174,12 @@
#define __arch_atomic_exchange_and_add_64(mem, value) \
({ \
__typeof (*mem) __val, __tmp; \
- __asm __volatile ("1: ldarx %0,0,%3\n" \
- " add %1,%0,%4\n" \
- " stdcx. %1,0,%3\n" \
+ __asm __volatile ("1: ldarx %0,%y2\n" \
+ " add %1,%0,%3\n" \
+ " stdcx. %1,%y2\n" \
" bne- 1b" \
- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
- : "b" (mem), "r" (value), "m" (*mem) \
+ : "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem)) \
+ : "r" (value) \
: "cr0", "memory"); \
__val; \
})
@@ -187,12 +187,12 @@
#define __arch_atomic_increment_val_64(mem) \
({ \
__typeof (*(mem)) __val; \
- __asm __volatile ("1: ldarx %0,0,%2\n" \
+ __asm __volatile ("1: ldarx %0,%y1\n" \
" addi %0,%0,1\n" \
- " stdcx. %0,0,%2\n" \
+ " stdcx. %0,%y1\n" \
" bne- 1b" \
- : "=&b" (__val), "=m" (*mem) \
- : "b" (mem), "m" (*mem) \
+ : "=&b" (__val), "+Z" (*(mem)) \
+ : \
: "cr0", "memory"); \
__val; \
})
@@ -200,27 +200,27 @@
#define __arch_atomic_decrement_val_64(mem) \
({ \
__typeof (*(mem)) __val; \
- __asm __volatile ("1: ldarx %0,0,%2\n" \
+ __asm __volatile ("1: ldarx %0,%y1\n" \
" subi %0,%0,1\n" \
- " stdcx. %0,0,%2\n" \
+ " stdcx. %0,%y1\n" \
" bne- 1b" \
- : "=&b" (__val), "=m" (*mem) \
- : "b" (mem), "m" (*mem) \
+ : "=&b" (__val), "+Z" (*(mem)) \
+ : \
: "cr0", "memory"); \
__val; \
})
#define __arch_atomic_decrement_if_positive_64(mem) \
({ int __val, __tmp; \
- __asm __volatile ("1: ldarx %0,0,%3\n" \
+ __asm __volatile ("1: ldarx %0,%y2\n" \
" cmpdi 0,%0,0\n" \
" addi %1,%0,-1\n" \
" ble 2f\n" \
- " stdcx. %1,0,%3\n" \
+ " stdcx. %1,%y2\n" \
" bne- 1b\n" \
"2: " __ARCH_ACQ_INSTR \
- : "=&b" (__val), "=&r" (__tmp), "=m" (*mem) \
- : "b" (mem), "m" (*mem) \
+ : "=&b" (__val), "=&r" (__tmp), "+Z" (*(mem)) \
+ : \
: "cr0", "memory"); \
__val; \
})