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Accepting request 175783 from home:dimstar:branches:multimedia:libs

Browse Source 
Update to 0.4.17

OBS-URL: https://build.opensuse.org/request/show/175783
OBS-URL: https://build.opensuse.org/package/show/multimedia:libs/orc?expand=0&rev=35
This commit is contained in:
Dave Plater 2013-05-16 07:54:55 +00:00 committed by Git OBS Bridge
parent 8346b24416
commit d5e70642e9
6 changed files with 19 additions and 260 deletions
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20
altivec.patch
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@ -1,20 +0,0 @@
--- orc/orcrules-altivec.c
+++ orc/orcrules-altivec.c
@@ -1141,7 +1141,7 @@ powerpc_rule_cmpltf (OrcCompiler *p, void *user, OrcInstruction *insn)
int src2 = ORC_SRC_ARG (p, insn, 1);
int dest = ORC_DEST_ARG (p, insn, 0);
- powerpc_emit_VXR (p, "vcmpgefp", 0x100001c6, dest, src2, src1, FALSE);
+ powerpc_emit_VXR (p, "vcmpgtfp", 0x100002c6, dest, src2, src1, FALSE);
}
static void
@@ -1151,7 +1151,7 @@ powerpc_rule_cmplef (OrcCompiler *p, void *user, OrcInstruction *insn)
int src2 = ORC_SRC_ARG (p, insn, 1);
int dest = ORC_DEST_ARG (p, insn, 0);
- powerpc_emit_VXR (p, "vcmpgtfp", 0x100002c6, dest, src2, src1, FALSE);
+ powerpc_emit_VXR (p, "vcmpgefp", 0x100001c6, dest, src2, src1, FALSE);
}
static void

3
orc-0.4.16.tar.gz
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@ -1,3 +0,0 @@
version https://git-lfs.github.com/spec/v1
oid sha256:700e4edba20a0ed42164b645da26ce515b883d4c4633b222302f1e541f2a58ab
size 668368

3
orc-0.4.17.tar.gz Normal file
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@ -0,0 +1,3 @@
version https://git-lfs.github.com/spec/v1
oid sha256:4fc7cca48c59fff23afee78fb642cdbde001f56401c8f47b95a16578d1d5d7e8
size 724990

17
orc.changes
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@ -1,3 +1,14 @@
-------------------------------------------------------------------
Wed May 15 18:05:56 UTC 2013 - dimstar@opensuse.org
- Update to version 0.4.17:
+ Merged known distro patches.
+ Added MIPS backend.
+ Disabled ARM backend because of poor coverage.
+ Added bytecode parsing and writing. This can be used instead of
manual creation of OrcPrograms.
- Drop altivec.patch and ppc64.patch: fixed upstream.
-------------------------------------------------------------------
Mon Sep 17 17:48:52 UTC 2012 - schwab@linux-m68k.org
@ -8,17 +19,17 @@ Mon Sep 17 17:48:52 UTC 2012 - schwab@linux-m68k.org
-------------------------------------------------------------------
Thu Mar 8 11:58:18 UTC 2012 - idonmez@suse.com
- Disable check on ARM
- Disable check on ARM.
-------------------------------------------------------------------
Thu Feb 2 12:26:37 UTC 2012 - idonmez@suse.com
- Fix license to be BSD-3-Clause
- Fix license to be BSD-3-Clause.
-------------------------------------------------------------------
Wed Feb 1 11:09:49 UTC 2012 - dvaleev@suse.com
- disable check on ppc ppc64
- disable check on ppc ppc64.
-------------------------------------------------------------------
Tue Oct 4 07:47:08 UTC 2011 - vuntz@opensuse.org

8
orc.spec
View File

@ -1,7 +1,7 @@
#
# spec file for package orc
#
# Copyright (c) 2012 SUSE LINUX Products GmbH, Nuernberg, Germany.
# Copyright (c) 2013 SUSE LINUX Products GmbH, Nuernberg, Germany.
# Copyright (c) 2010 Dominique Leuenberger, Amsterdam, Netherlands.
#
# All modifications and additions to the file contributed by third parties
@ -21,13 +21,11 @@ Name: orc
Summary: The Oil Runtime Compiler
License: BSD-3-Clause
Group: Productivity/Multimedia/Other
Version: 0.4.16
Version: 0.4.17
Release: 0
Url: http://code.entropywave.com/projects/orc/
Source: http://code.entropywave.com/download/orc/%{name}-%{version}.tar.gz
Source99: baselibs.conf
Patch1: ppc64.patch
Patch2: altivec.patch
BuildRequires: gtk-doc
BuildRequires: pkg-config
Provides: %{name}-devel = %{version}
@ -64,8 +62,6 @@ arithmetic operations.
%prep
%setup -q
%patch1
%patch2
%build
%configure \

228
ppc64.patch
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@ -1,228 +0,0 @@
--- orc/orcpowerpc.c
+++ orc/orcpowerpc.c
@@ -150,6 +150,48 @@ powerpc_emit_stwu (OrcCompiler *compiler, int regs, int rega, int offset)
}
void
+powerpc_emit_ld (OrcCompiler *compiler, int regd, int rega, int imm)
+{
+ unsigned int insn;
+
+ ORC_ASM_CODE(compiler," ld %s, %d(%s)\n",
+ powerpc_get_regname(regd),
+ imm, powerpc_get_regname(rega));
+ insn = (58<<26) | (powerpc_regnum (regd)<<21) | (powerpc_regnum (rega)<<16);
+ insn |= imm&0xffff;
+
+ powerpc_emit (compiler, insn);
+}
+
+void
+powerpc_emit_std (OrcCompiler *compiler, int regs, int rega, int offset)
+{
+ unsigned int insn;
+
+ ORC_ASM_CODE(compiler," std %s, %d(%s)\n",
+ powerpc_get_regname(regs),
+ offset, powerpc_get_regname(rega));
+ insn = (62<<26) | (powerpc_regnum (regs)<<21) | (powerpc_regnum (rega)<<16);
+ insn |= offset&0xffff;
+
+ powerpc_emit (compiler, insn);
+}
+
+void
+powerpc_emit_stdu (OrcCompiler *compiler, int regs, int rega, int offset)
+{
+ unsigned int insn;
+
+ ORC_ASM_CODE(compiler," stdu %s, %d(%s)\n",
+ powerpc_get_regname(regs),
+ offset, powerpc_get_regname(rega));
+ insn = (62<<26) | (powerpc_regnum (regs)<<21) | (powerpc_regnum (rega)<<16);
+ insn |= (offset&0xffff) | 1;
+
+ powerpc_emit (compiler, insn);
+}
+
+void
powerpc_emit_srawi (OrcCompiler *compiler, int regd, int rega, int shift,
int record)
{
@@ -381,6 +423,9 @@ orc_powerpc_flush_cache (OrcCode *code)
int size = code->code_size;
ptr = code->code;
+#ifdef __powerpc64__
+ *(unsigned char **) ptr = (unsigned char *) code->exec + 24;
+#endif
for (i=0;i<size;i+=cache_line_size) {
__asm__ __volatile__ ("dcbst %0,%1" :: "b" (ptr), "r" (i));
}
@@ -500,13 +545,23 @@ powerpc_load_long_constant (OrcCompiler *p, int reg, orc_uint32 a,
powerpc_emit (p, d);
powerpc_emit_label (p, label_skip);
- powerpc_emit_lwz (p,
- greg,
- POWERPC_R3,
- (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[ORC_VAR_A2]));
- powerpc_emit_lwz (p,
- greg, greg,
- (int)ORC_STRUCT_OFFSET(OrcCode, exec));
+ if (p->is_64bit) {
+ powerpc_emit_ld (p,
+ greg,
+ POWERPC_R3,
+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[ORC_VAR_A2]));
+ powerpc_emit_ld (p,
+ greg, greg,
+ (int)ORC_STRUCT_OFFSET(OrcCode, exec));
+ } else {
+ powerpc_emit_lwz (p,
+ greg,
+ POWERPC_R3,
+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[ORC_VAR_A2]));
+ powerpc_emit_lwz (p,
+ greg, greg,
+ (int)ORC_STRUCT_OFFSET(OrcCode, exec));
+ }
powerpc_add_fixup (p, 1, p->codeptr, label_data);
{
--- orc/orcpowerpc.h
+++ orc/orcpowerpc.h
@@ -6,6 +6,10 @@
ORC_BEGIN_DECLS
+typedef enum {
+ ORC_TARGET_POWERPC_64BIT = (1<<0)
+} OrcTargetPowerPCFlags;
+
#ifdef ORC_ENABLE_UNSTABLE_API
enum {
@@ -86,6 +90,9 @@ void powerpc_emit_addi (OrcCompiler *compiler, int regd, int rega, int imm);
void powerpc_emit_lwz (OrcCompiler *compiler, int regd, int rega, int imm);
void powerpc_emit_stw (OrcCompiler *compiler, int regs, int rega, int offset);
void powerpc_emit_stwu (OrcCompiler *compiler, int regs, int rega, int offset);
+void powerpc_emit_ld (OrcCompiler *compiler, int regd, int rega, int imm);
+void powerpc_emit_std (OrcCompiler *compiler, int regs, int rega, int offset);
+void powerpc_emit_stdu (OrcCompiler *compiler, int regs, int rega, int offset);
void powerpc_emit_ret (OrcCompiler *compiler);
void powerpc_emit_b (OrcCompiler *compiler, int label);
--- orc/orcprogram-altivec.c
+++ orc/orcprogram-altivec.c
@@ -26,7 +26,17 @@ powerpc_emit_prologue (OrcCompiler *compiler)
ORC_ASM_CODE (compiler, ".global %s\n", compiler->program->name);
ORC_ASM_CODE (compiler, "%s:\n", compiler->program->name);
- powerpc_emit_stwu (compiler, POWERPC_R1, POWERPC_R1, -16);
+ if (compiler->is_64bit) {
+ ORC_ASM_CODE (compiler, " .quad .%s,.TOC.@tocbase,0\n",
+ compiler->program->name);
+ ORC_ASM_CODE (compiler, ".%s:\n", compiler->program->name);
+ powerpc_emit (compiler, 0); powerpc_emit (compiler, 0);
+ powerpc_emit (compiler, 0); powerpc_emit (compiler, 0);
+ powerpc_emit (compiler, 0); powerpc_emit (compiler, 0);
+ powerpc_emit_stdu (compiler, POWERPC_R1, POWERPC_R1, -16);
+ } else {
+ powerpc_emit_stwu (compiler, POWERPC_R1, POWERPC_R1, -16);
+ }
for(i=POWERPC_R13;i<=POWERPC_R31;i++){
if (compiler->used_regs[i]) {
@@ -82,7 +92,13 @@ orc_powerpc_init (void)
unsigned int
orc_compiler_powerpc_get_default_flags (void)
{
- return 0;
+ unsigned int flags = 0;
+
+#ifdef __powerpc64__
+ flags |= ORC_TARGET_POWERPC_64BIT;
+#endif
+
+ return flags;
}
void
@@ -90,6 +106,10 @@ orc_compiler_powerpc_init (OrcCompiler *compiler)
{
int i;
+ if (compiler->target_flags & ORC_TARGET_POWERPC_64BIT) {
+ compiler->is_64bit = TRUE;
+ }
+
for(i=0;i<32;i++){
compiler->valid_regs[POWERPC_R0+i] = 1;
compiler->valid_regs[POWERPC_V0+i] = 1;
@@ -127,10 +147,17 @@ powerpc_load_inner_constants (OrcCompiler *compiler)
case ORC_VAR_TYPE_SRC:
case ORC_VAR_TYPE_DEST:
if (compiler->vars[i].ptr_register) {
- powerpc_emit_lwz (compiler,
- compiler->vars[i].ptr_register,
- POWERPC_R3,
- (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[i]));
+ if (compiler->is_64bit) {
+ powerpc_emit_ld (compiler,
+ compiler->vars[i].ptr_register,
+ POWERPC_R3,
+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[i]));
+ } else {
+ powerpc_emit_lwz (compiler,
+ compiler->vars[i].ptr_register,
+ POWERPC_R3,
+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[i]));
+ }
} else {
/* FIXME */
ORC_ASM_CODE(compiler,"ERROR");
@@ -319,10 +346,17 @@ orc_compiler_powerpc_assemble (OrcCompiler *compiler)
if (compiler->vars[k].vartype == ORC_VAR_TYPE_SRC ||
compiler->vars[k].vartype == ORC_VAR_TYPE_DEST) {
if (compiler->vars[k].ptr_register) {
- powerpc_emit_lwz (compiler,
- compiler->vars[k].ptr_register,
- POWERPC_R3,
- (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
+ if (compiler->is_64bit) {
+ powerpc_emit_ld (compiler,
+ compiler->vars[k].ptr_register,
+ POWERPC_R3,
+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
+ } else {
+ powerpc_emit_lwz (compiler,
+ compiler->vars[k].ptr_register,
+ POWERPC_R3,
+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
+ }
powerpc_emit_lwz (compiler,
POWERPC_R0,
POWERPC_R3,
@@ -331,10 +365,17 @@ orc_compiler_powerpc_assemble (OrcCompiler *compiler)
compiler->vars[k].ptr_register,
compiler->vars[k].ptr_register,
POWERPC_R0);
- powerpc_emit_stw (compiler,
- compiler->vars[k].ptr_register,
- POWERPC_R3,
- (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
+ if (compiler->is_64bit) {
+ powerpc_emit_std (compiler,
+ compiler->vars[k].ptr_register,
+ POWERPC_R3,
+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
+ } else {
+ powerpc_emit_stw (compiler,
+ compiler->vars[k].ptr_register,
+ POWERPC_R3,
+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
+ }
} else {
ORC_ASM_CODE(compiler,"ERROR\n");
}