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2 Commits
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| 8aaf7a7136 | |||
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86f61b9ab1 |
BIN
pcm-202502.tar.gz
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BIN
pcm-202502.tar.gz
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pcm-202509.tar.gz
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3
pcm-202509.tar.gz
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@@ -0,0 +1,3 @@
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version https://git-lfs.github.com/spec/v1
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oid sha256:b0330251255256ae61638c89cb508f8deebfeb3ea940d943af5d3a29bddc590a
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size 1225899
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35
pcm.changes
35
pcm.changes
@@ -1,3 +1,38 @@
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-------------------------------------------------------------------
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Sun Sep 14 11:00:00 UTC 2025 - Roman Dementiev <roman.dementiev@intel.com>
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- update to version 202509
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* pcm-iio: enable the tool on Icelake-D Xeon by adding event opCode file
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* pcm-power: implement csv output
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* pcm-iio: add date/time to csv output
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* pcm-raw: support second OCR (offcore-response) counter on Intel Atom/E-core
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* pcm-pcie: allow core offlining on select Intel processor generations
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* pcm-raw: implement -? option to print all Intel event descriptions
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* support 1 bit in short notation: -b 1 instead of -b 1:1
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* pcm: allow core 0 to be offlined
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* don't fail if PCIe PMU discovery table is corrupt, produce BIOS table bug report instead
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* Grafana dashboard: don't display UPI panels if there no Intel UPI links detected
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* pcm-iio: add documentation
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* pcm-memory: implement --nocxl option
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* documentation updates
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* pcm-accel: update documentation
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* pcm-raw: add option to select first record in Intel PMT db match result
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* pcm-bw-histogram.sh: expect pcm-memory to reside in same folder, rather than ./
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* drop pcm-lspci, replaced by pcm-iio -list
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* add L3 shared cache info
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* fix DRAM energy unit on Intel Xeon 6 Granite Rapids/Sierra Forest/Grand Ridge
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* fix issue on Intel Xeon 6 Granite Rapids with skipping IAA accelerator
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* fix OCR events on GNR-D (Xeon 6 SoC)
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* fix pcm-numa on Intel Xeon 6 Granite Rapids
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* make cpu family/model extraction fully compliant to the spec to support the upcoming Diamond Rapids Xeon detection
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* pcm-pcie: correct events help description
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* pcm-sensor-server metric exporter: don't exit if IIO PMUs are not availabile
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* pcm-pcie: check if the required CHA PMUs are available
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* catch and report exceptions from thread creation
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* increase CXL port array size and add bounds checking
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* fix issue when CPUBUSNO_VALID is 0
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* fix displaying binary codes in the terminal
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-------------------------------------------------------------------
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Sat Mar 01 11:00:00 UTC 2025 - Roman Dementiev <roman.dementiev@intel.com>
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5
pcm.spec
5
pcm.spec
@@ -17,7 +17,7 @@
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Name: pcm
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Version: 202502
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Version: 202509
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Release: 0
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Summary: Intel Performance Counter Monitor
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License: BSD-3-Clause
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@@ -62,6 +62,7 @@ rm -rf %{buildroot}%{_docdir}/pcm/generate_summary_readme.md
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%{_docdir}/pcm/PCM-SENSOR-SERVER-README.md
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%{_docdir}/pcm/PCM_RAW_README.md
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%{_docdir}/pcm/CXL_README.md
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%{_docdir}/pcm/PCM_IIO_README.md
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%{_docdir}/pcm/LATENCY-OPTIMIZED-MODE.md
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%{_docdir}/pcm/PCM_ACCEL_README.md
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%{_docdir}/pcm/README.md
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@@ -70,7 +71,6 @@ rm -rf %{buildroot}%{_docdir}/pcm/generate_summary_readme.md
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%{_sbindir}/pcm-core
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%{_sbindir}/pcm-iio
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%{_sbindir}/pcm-latency
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%{_sbindir}/pcm-lspci
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%{_sbindir}/pcm-memory
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%{_sbindir}/pcm-msr
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%{_sbindir}/pcm-tpmi
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@@ -98,6 +98,7 @@ rm -rf %{buildroot}%{_docdir}/pcm/generate_summary_readme.md
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%{_datadir}/pcm/opCode-6-207.txt
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%{_datadir}/pcm/opCode-6-182.txt
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%{_datadir}/pcm/opCode-6-174.txt
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%{_datadir}/pcm/opCode-6-108.txt
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%{_datadir}/pcm/PMURegisterDeclarations
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%changelog
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