d67e9c0b68
- Expose pschange-mc-no "feature", indicating CPU does not have the page size change machine check vulnerability (CVE-2018-12207 bsc#1155812) target-i386-add-PSCHANGE_NO-bit-for-the-.patch - Expose taa-no "feature", indicating CPU does not have the TSX Async Abort vulnerability. (CVE-2019-11135 bsc#1152506) target-i386-Export-TAA_NO-bit-to-guests.patch Patch queue updated from git://github.com/openSUSE/qemu.git opensuse-4.1 OBS-URL: https://build.opensuse.org/request/show/749743 OBS-URL: https://build.opensuse.org/package/show/Virtualization/qemu?expand=0&rev=512
30 lines
1.1 KiB
Diff
30 lines
1.1 KiB
Diff
From: Paolo Bonzini <pbonzini@redhat.com>
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Date: Wed, 13 Nov 2019 15:54:35 +0100
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Subject: target/i386: add PSCHANGE_NO bit for the ARCH_CAPABILITIES MSR
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Git-commit: 7f7a585d5bd3c7f1275d28c77d9d67513c1de36c
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Reference: bsc#1155812 CVE-2018-12207
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This is required to disable ITLB multihit mitigations in nested
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hypervisors.
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Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Signed-off-by: Bruce Rogers <brogers@suse.com>
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---
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target/i386/cpu.c | 2 +-
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1 file changed, 1 insertion(+), 1 deletion(-)
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diff --git a/target/i386/cpu.c b/target/i386/cpu.c
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index 19751e37a71fee27944526fe507c..5191367f89ee4d1131c4309633de 100644
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--- a/target/i386/cpu.c
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+++ b/target/i386/cpu.c
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@@ -1188,7 +1188,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS] = {
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.type = MSR_FEATURE_WORD,
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.feat_names = {
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"rdctl-no", "ibrs-all", "rsba", "skip-l1dfl-vmentry",
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- "ssb-no", "mds-no", NULL, NULL,
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+ "ssb-no", "mds-no", "pschange-mc-no", NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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NULL, NULL, NULL, NULL,
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