- Upstream patches from Jan

51d277a3-x86-don-t-pass-negative-time-to-gtime_to_gtsc-try-2.patch
  51d27807-iommu-amd-Fix-logic-for-clearing-the-IOMMU-interrupt-bits.patch
  51d27841-iommu-amd-Workaround-for-erratum-787.patch
  51daa074-Revert-hvmloader-always-include-HPET-table.patch 

- Dropped deprecated or unnecessary patches
  pvdrv-import-shared-info.patch 
  minios-fixups.patch

OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=258
This commit is contained in:
Charles Arnold 2013-07-17 02:04:59 +00:00 committed by Git OBS Bridge
parent 5139041282
commit 11035112e8
12 changed files with 467 additions and 117 deletions

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@ -0,0 +1,44 @@
# Commit 5ad914bc867c5a6a4957869c89918f4e1f9dd9c4
# Date 2013-07-02 08:48:03 +0200
# Author Jan Beulich <jbeulich@suse.com>
# Committer Jan Beulich <jbeulich@suse.com>
x86: don't pass negative time to gtime_to_gtsc() (try 2)
This mostly reverts commit eb60be3d ("x86: don't pass negative time to
gtime_to_gtsc()") and instead corrects __update_vcpu_system_time()'s
handling of this_cpu(cpu_time).stime_local_stamp dating back before the
start of a HVM guest (which would otherwise lead to a negative value
getting passed to gtime_to_gtsc(), causing scale_delta() to produce
meaningless output).
Flushing the value to zero was wrong, and printing a message for
something that can validly happen wasn't very useful either.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir@xen.org>
--- a/xen/arch/x86/time.c
+++ b/xen/arch/x86/time.c
@@ -823,16 +823,13 @@ static void __update_vcpu_system_time(st
struct pl_time *pl = &v->domain->arch.hvm_domain.pl_time;
stime += pl->stime_offset + v->arch.hvm_vcpu.stime_offset;
- if ( (s64)stime < 0 )
- {
- printk(XENLOG_G_WARNING "d%dv%d: bogus time %" PRId64
- " (offsets %" PRId64 "/%" PRId64 ")\n",
- d->domain_id, v->vcpu_id, stime,
- pl->stime_offset, v->arch.hvm_vcpu.stime_offset);
- stime = 0;
- }
+ if ( stime >= 0 )
+ tsc_stamp = gtime_to_gtsc(d, stime);
+ else
+ tsc_stamp = -gtime_to_gtsc(d, -stime);
}
- tsc_stamp = gtime_to_gtsc(d, stime);
+ else
+ tsc_stamp = gtime_to_gtsc(d, stime);
}
else
{

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@ -0,0 +1,285 @@
# Commit 2823a0c7dfc979db316787e1dd42a8845e5825c0
# Date 2013-07-02 08:49:43 +0200
# Author Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
# Committer Jan Beulich <jbeulich@suse.com>
iommu/amd: Fix logic for clearing the IOMMU interrupt bits
The IOMMU interrupt bits in the IOMMU status registers are
"read-only, and write-1-to-clear (RW1C). Therefore, the existing
logic which reads the register, set the bit, and then writing back
the values could accidentally clear certain bits if it has been set.
The correct logic would just be writing only the value which only
set the interrupt bits, and leave the rest to zeros.
This patch also, clean up #define masks as Jan has suggested.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
With iommu_interrupt_handler() properly having got switched its readl()
from status to control register, the subsequent writel() needed to be
switched too (and the RW1C comment there was bogus).
Some of the cleanup went too far - undone.
Further, with iommu_interrupt_handler() now actually disabling the
interrupt sources, they also need to get re-enabled by the tasklet once
it finished processing the respective log. This also implies re-running
the tasklet so that log entries added between reading the log and re-
enabling the interrupt will get handled in a timely manner.
Finally, guest write emulation to the status register needs to be done
with the RW1C (and RO for all other bits) semantics in mind too.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Tim Deegan <tim@xen.org>
Acked-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
--- a/xen/drivers/passthrough/amd/iommu_cmd.c
+++ b/xen/drivers/passthrough/amd/iommu_cmd.c
@@ -75,11 +75,9 @@ static void flush_command_buffer(struct
u32 cmd[4], status;
int loop_count, comp_wait;
- /* clear 'ComWaitInt' in status register (WIC) */
- set_field_in_reg_u32(IOMMU_CONTROL_ENABLED, 0,
- IOMMU_STATUS_COMP_WAIT_INT_MASK,
- IOMMU_STATUS_COMP_WAIT_INT_SHIFT, &status);
- writel(status, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+ /* RW1C 'ComWaitInt' in status register */
+ writel(IOMMU_STATUS_COMP_WAIT_INT_MASK,
+ iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
/* send an empty COMPLETION_WAIT command to flush command buffer */
cmd[3] = cmd[2] = 0;
@@ -103,9 +101,9 @@ static void flush_command_buffer(struct
if ( comp_wait )
{
- /* clear 'ComWaitInt' in status register (WIC) */
- status &= IOMMU_STATUS_COMP_WAIT_INT_MASK;
- writel(status, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+ /* RW1C 'ComWaitInt' in status register */
+ writel(IOMMU_STATUS_COMP_WAIT_INT_MASK,
+ iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
return;
}
AMD_IOMMU_DEBUG("Warning: ComWaitInt bit did not assert!\n");
--- a/xen/drivers/passthrough/amd/iommu_guest.c
+++ b/xen/drivers/passthrough/amd/iommu_guest.c
@@ -754,7 +754,14 @@ static void guest_iommu_mmio_write64(str
u64_to_reg(&iommu->ppr_log.reg_tail, val);
break;
case IOMMU_STATUS_MMIO_OFFSET:
- u64_to_reg(&iommu->reg_status, val);
+ val &= IOMMU_STATUS_EVENT_OVERFLOW_MASK |
+ IOMMU_STATUS_EVENT_LOG_INT_MASK |
+ IOMMU_STATUS_COMP_WAIT_INT_MASK |
+ IOMMU_STATUS_PPR_LOG_OVERFLOW_MASK |
+ IOMMU_STATUS_PPR_LOG_INT_MASK |
+ IOMMU_STATUS_GAPIC_LOG_OVERFLOW_MASK |
+ IOMMU_STATUS_GAPIC_LOG_INT_MASK;
+ u64_to_reg(&iommu->reg_status, reg_to_u64(iommu->reg_status) & ~val);
break;
default:
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -344,13 +344,13 @@ static void set_iommu_ppr_log_control(st
writeq(0, iommu->mmio_base + IOMMU_PPR_LOG_TAIL_OFFSET);
iommu_set_bit(&entry, IOMMU_CONTROL_PPR_ENABLE_SHIFT);
- iommu_set_bit(&entry, IOMMU_CONTROL_PPR_INT_SHIFT);
+ iommu_set_bit(&entry, IOMMU_CONTROL_PPR_LOG_INT_SHIFT);
iommu_set_bit(&entry, IOMMU_CONTROL_PPR_LOG_ENABLE_SHIFT);
}
else
{
iommu_clear_bit(&entry, IOMMU_CONTROL_PPR_ENABLE_SHIFT);
- iommu_clear_bit(&entry, IOMMU_CONTROL_PPR_INT_SHIFT);
+ iommu_clear_bit(&entry, IOMMU_CONTROL_PPR_LOG_INT_SHIFT);
iommu_clear_bit(&entry, IOMMU_CONTROL_PPR_LOG_ENABLE_SHIFT);
}
@@ -410,7 +410,7 @@ static void iommu_reset_log(struct amd_i
void (*ctrl_func)(struct amd_iommu *iommu, int))
{
u32 entry;
- int log_run, run_bit, of_bit;
+ int log_run, run_bit;
int loop_count = 1000;
BUG_ON(!iommu || ((log != &iommu->event_log) && (log != &iommu->ppr_log)));
@@ -419,10 +419,6 @@ static void iommu_reset_log(struct amd_i
IOMMU_STATUS_EVENT_LOG_RUN_SHIFT :
IOMMU_STATUS_PPR_LOG_RUN_SHIFT;
- of_bit = ( log == &iommu->event_log ) ?
- IOMMU_STATUS_EVENT_OVERFLOW_SHIFT :
- IOMMU_STATUS_PPR_LOG_OVERFLOW_SHIFT;
-
/* wait until EventLogRun bit = 0 */
do {
entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
@@ -439,9 +435,10 @@ static void iommu_reset_log(struct amd_i
ctrl_func(iommu, IOMMU_CONTROL_DISABLED);
- /*clear overflow bit */
- iommu_clear_bit(&entry, of_bit);
- writel(entry, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+ /* RW1C overflow bit */
+ writel(log == &iommu->event_log ? IOMMU_STATUS_EVENT_OVERFLOW_MASK
+ : IOMMU_STATUS_PPR_LOG_OVERFLOW_MASK,
+ iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
/*reset event log base address */
log->head = 0;
@@ -611,22 +608,33 @@ static void iommu_check_event_log(struct
u32 entry;
unsigned long flags;
+ /* RW1C interrupt status bit */
+ writel(IOMMU_STATUS_EVENT_LOG_INT_MASK,
+ iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+
iommu_read_log(iommu, &iommu->event_log,
sizeof(event_entry_t), parse_event_log_entry);
spin_lock_irqsave(&iommu->lock, flags);
- /*check event overflow */
+ /* Check event overflow. */
entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
-
if ( iommu_get_bit(entry, IOMMU_STATUS_EVENT_OVERFLOW_SHIFT) )
iommu_reset_log(iommu, &iommu->event_log, set_iommu_event_log_control);
-
- /* reset interrupt status bit */
- entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
- iommu_set_bit(&entry, IOMMU_STATUS_EVENT_LOG_INT_SHIFT);
-
- writel(entry, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+ else
+ {
+ entry = readl(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
+ if ( !(entry & IOMMU_CONTROL_EVENT_LOG_INT_MASK) )
+ {
+ entry |= IOMMU_CONTROL_EVENT_LOG_INT_MASK;
+ writel(entry, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
+ /*
+ * Re-schedule the tasklet to handle eventual log entries added
+ * between reading the log above and re-enabling the interrupt.
+ */
+ tasklet_schedule(&amd_iommu_irq_tasklet);
+ }
+ }
spin_unlock_irqrestore(&iommu->lock, flags);
}
@@ -681,22 +689,33 @@ static void iommu_check_ppr_log(struct a
u32 entry;
unsigned long flags;
+ /* RW1C interrupt status bit */
+ writel(IOMMU_STATUS_PPR_LOG_INT_MASK,
+ iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+
iommu_read_log(iommu, &iommu->ppr_log,
sizeof(ppr_entry_t), parse_ppr_log_entry);
spin_lock_irqsave(&iommu->lock, flags);
- /*check event overflow */
+ /* Check event overflow. */
entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
-
if ( iommu_get_bit(entry, IOMMU_STATUS_PPR_LOG_OVERFLOW_SHIFT) )
iommu_reset_log(iommu, &iommu->ppr_log, set_iommu_ppr_log_control);
-
- /* reset interrupt status bit */
- entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
- iommu_set_bit(&entry, IOMMU_STATUS_PPR_LOG_INT_SHIFT);
-
- writel(entry, iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+ else
+ {
+ entry = readl(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
+ if ( !(entry & IOMMU_CONTROL_PPR_LOG_INT_MASK) )
+ {
+ entry |= IOMMU_CONTROL_PPR_LOG_INT_MASK;
+ writel(entry, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
+ /*
+ * Re-schedule the tasklet to handle eventual log entries added
+ * between reading the log above and re-enabling the interrupt.
+ */
+ tasklet_schedule(&amd_iommu_irq_tasklet);
+ }
+ }
spin_unlock_irqrestore(&iommu->lock, flags);
}
@@ -733,11 +752,14 @@ static void iommu_interrupt_handler(int
spin_lock_irqsave(&iommu->lock, flags);
- /* Silence interrupts from both event and PPR logging */
- entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
- iommu_clear_bit(&entry, IOMMU_STATUS_EVENT_LOG_INT_SHIFT);
- iommu_clear_bit(&entry, IOMMU_STATUS_PPR_LOG_INT_SHIFT);
- writel(entry, iommu->mmio_base+IOMMU_STATUS_MMIO_OFFSET);
+ /*
+ * Silence interrupts from both event and PPR by clearing the
+ * enable logging bits in the control register
+ */
+ entry = readl(iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
+ iommu_clear_bit(&entry, IOMMU_CONTROL_EVENT_LOG_INT_SHIFT);
+ iommu_clear_bit(&entry, IOMMU_CONTROL_PPR_LOG_INT_SHIFT);
+ writel(entry, iommu->mmio_base + IOMMU_CONTROL_MMIO_OFFSET);
spin_unlock_irqrestore(&iommu->lock, flags);
--- a/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h
+++ b/xen/include/asm-x86/hvm/svm/amd-iommu-defs.h
@@ -336,14 +336,17 @@
#define IOMMU_CONTROL_ISOCHRONOUS_SHIFT 11
#define IOMMU_CONTROL_COMMAND_BUFFER_ENABLE_MASK 0x00001000
#define IOMMU_CONTROL_COMMAND_BUFFER_ENABLE_SHIFT 12
+#define IOMMU_CONTROL_PPR_LOG_ENABLE_MASK 0x00002000
+#define IOMMU_CONTROL_PPR_LOG_ENABLE_SHIFT 13
+#define IOMMU_CONTROL_PPR_LOG_INT_MASK 0x00004000
+#define IOMMU_CONTROL_PPR_LOG_INT_SHIFT 14
+#define IOMMU_CONTROL_PPR_ENABLE_MASK 0x00008000
+#define IOMMU_CONTROL_PPR_ENABLE_SHIFT 15
+#define IOMMU_CONTROL_GT_ENABLE_MASK 0x00010000
+#define IOMMU_CONTROL_GT_ENABLE_SHIFT 16
#define IOMMU_CONTROL_RESTART_MASK 0x80000000
#define IOMMU_CONTROL_RESTART_SHIFT 31
-#define IOMMU_CONTROL_PPR_LOG_ENABLE_SHIFT 13
-#define IOMMU_CONTROL_PPR_INT_SHIFT 14
-#define IOMMU_CONTROL_PPR_ENABLE_SHIFT 15
-#define IOMMU_CONTROL_GT_ENABLE_SHIFT 16
-
/* Exclusion Register */
#define IOMMU_EXCLUSION_BASE_LOW_OFFSET 0x20
#define IOMMU_EXCLUSION_BASE_HIGH_OFFSET 0x24
@@ -395,9 +398,18 @@
#define IOMMU_STATUS_EVENT_LOG_RUN_SHIFT 3
#define IOMMU_STATUS_CMD_BUFFER_RUN_MASK 0x00000010
#define IOMMU_STATUS_CMD_BUFFER_RUN_SHIFT 4
+#define IOMMU_STATUS_PPR_LOG_OVERFLOW_MASK 0x00000020
#define IOMMU_STATUS_PPR_LOG_OVERFLOW_SHIFT 5
+#define IOMMU_STATUS_PPR_LOG_INT_MASK 0x00000040
#define IOMMU_STATUS_PPR_LOG_INT_SHIFT 6
+#define IOMMU_STATUS_PPR_LOG_RUN_MASK 0x00000080
#define IOMMU_STATUS_PPR_LOG_RUN_SHIFT 7
+#define IOMMU_STATUS_GAPIC_LOG_OVERFLOW_MASK 0x00000100
+#define IOMMU_STATUS_GAPIC_LOG_OVERFLOW_SHIFT 8
+#define IOMMU_STATUS_GAPIC_LOG_INT_MASK 0x00000200
+#define IOMMU_STATUS_GAPIC_LOG_INT_SHIFT 9
+#define IOMMU_STATUS_GAPIC_LOG_RUN_MASK 0x00000400
+#define IOMMU_STATUS_GAPIC_LOG_RUN_SHIFT 10
/* I/O Page Table */
#define IOMMU_PAGE_TABLE_ENTRY_SIZE 8

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@ -0,0 +1,57 @@
# Commit 9eabb0735400e2b6059dfa3f0b47a426f61f570a
# Date 2013-07-02 08:50:41 +0200
# Author Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
# Committer Jan Beulich <jbeulich@suse.com>
iommu/amd: Workaround for erratum 787
The IOMMU interrupt handling in bottom half must clear the PPR log interrupt
and event log interrupt bits to re-enable the interrupt. This is done by
writing 1 to the memory mapped register to clear the bit. Due to hardware bug,
if the driver tries to clear this bit while the IOMMU hardware also setting
this bit, the conflict will result with the bit being set. If the interrupt
handling code does not make sure to clear this bit, subsequent changes in the
event/PPR logs will no longer generating interrupts, and would result if
buffer overflow. After clearing the bits, the driver must read back
the register to verify.
Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
Adjust to apply on top of heavily modified patch 1. Adjust flow to get away
with a single readl() in each instance of the status register checks.
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Reviewed-by: Tim Deegan <tim@xen.org>
Acked-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
--- a/xen/drivers/passthrough/amd/iommu_init.c
+++ b/xen/drivers/passthrough/amd/iommu_init.c
@@ -636,6 +636,14 @@ static void iommu_check_event_log(struct
}
}
+ /*
+ * Workaround for erratum787:
+ * Re-check to make sure the bit has been cleared.
+ */
+ entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+ if ( entry & IOMMU_STATUS_EVENT_LOG_INT_MASK )
+ tasklet_schedule(&amd_iommu_irq_tasklet);
+
spin_unlock_irqrestore(&iommu->lock, flags);
}
@@ -717,6 +725,14 @@ static void iommu_check_ppr_log(struct a
}
}
+ /*
+ * Workaround for erratum787:
+ * Re-check to make sure the bit has been cleared.
+ */
+ entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
+ if ( entry & IOMMU_STATUS_PPR_LOG_INT_MASK )
+ tasklet_schedule(&amd_iommu_irq_tasklet);
+
spin_unlock_irqrestore(&iommu->lock, flags);
}

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@ -0,0 +1,37 @@
References: bnc#817799
# Commit 4867685f7916bb594a67f2f64a28bbf5ecb4949c
# Date 2013-07-08 13:20:20 +0200
# Author Jan Beulich <jbeulich@suse.com>
# Committer Jan Beulich <jbeulich@suse.com>
Revert "hvmloader: always include HPET table"
This reverts commit e4fd0475a08fda414da27c4e57b568f147cfc07e.
Conflicts:
tools/firmware/hvmloader/acpi/build.c
Signed-off-by: Jan Beulich <jbeulich@suse.com>
Acked-by: Keir Fraser <keir.xen@gmail.com>
--- a/tools/firmware/hvmloader/acpi/build.c
+++ b/tools/firmware/hvmloader/acpi/build.c
@@ -268,11 +268,13 @@ static int construct_secondary_tables(un
table_ptrs[nr_tables++] = (unsigned long)madt;
}
- /* HPET. Always included in DSDT, so always include it here too. */
- /* (And it's unconditionally required by Windows SVVP tests.) */
- hpet = construct_hpet();
- if (!hpet) return -1;
- table_ptrs[nr_tables++] = (unsigned long)hpet;
+ /* HPET. */
+ if ( hpet_exists(ACPI_HPET_ADDRESS) )
+ {
+ hpet = construct_hpet();
+ if (!hpet) return -1;
+ table_ptrs[nr_tables++] = (unsigned long)hpet;
+ }
/* WAET. */
waet = construct_waet();

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@ -1,8 +1,6 @@
Index: xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
===================================================================
--- xen-4.2.0-testing.orig/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
+++ xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
@@ -424,6 +424,11 @@ static int __devinit platform_pci_init(s
--- a/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
+++ b/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
@@ -419,6 +419,11 @@ static int __devinit platform_pci_init(s
platform_mmio = mmio_addr;
platform_mmiolen = mmio_len;

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@ -2,11 +2,9 @@ Make our PV drivers work with older hosts that do not recognize the new PV driv
Signed-off-by: K. Y. Srinivasan <ksrinivasan@novell.com>
Index: xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
===================================================================
--- xen-4.2.0-testing.orig/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
+++ xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
@@ -321,7 +321,10 @@ static int check_platform_magic(struct d
--- a/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
+++ b/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
@@ -316,7 +316,10 @@ static int check_platform_magic(struct d
if (magic != XEN_IOPORT_MAGIC_VAL) {
err = "unrecognised magic value";

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@ -1,12 +0,0 @@
Index: xen-4.3.0-testing/extras/mini-os/lib/math.c
===================================================================
--- xen-4.3.0-testing.orig/extras/mini-os/lib/math.c
+++ xen-4.3.0-testing/extras/mini-os/lib/math.c
@@ -186,6 +186,7 @@ __qdivrem(u_quad_t uq, u_quad_t vq, u_qu
* and thus
* m = 4 - n <= 2
*/
+ tmp.ul[H] = tmp.ul[L] = 0;
tmp.uq = uq;
u[0] = 0;
u[1] = HHALF(tmp.ul[H]);

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@ -1,62 +0,0 @@
Index: xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/evtchn.c
===================================================================
--- xen-4.2.0-testing.orig/unmodified_drivers/linux-2.6/platform-pci/evtchn.c
+++ xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/evtchn.c
@@ -40,7 +40,9 @@
#include <xen/platform-compat.h>
#endif
+#ifndef shared_info_area
void *shared_info_area;
+#endif
#define is_valid_evtchn(x) ((x) != 0)
#define evtchn_from_irq(x) (irq_evtchn[irq].evtchn)
Index: xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
===================================================================
--- xen-4.2.0-testing.orig/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
+++ xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
@@ -76,7 +76,6 @@ static uint64_t callback_via;
static int __devinit init_xen_info(void)
{
struct xen_add_to_physmap xatp;
- extern void *shared_info_area;
#ifdef __ia64__
xencomm_initialize();
@@ -84,6 +83,7 @@ static int __devinit init_xen_info(void)
setup_xen_features();
+#ifndef shared_info_area
shared_info_frame = alloc_xen_mmio(PAGE_SIZE) >> PAGE_SHIFT;
xatp.domid = DOMID_SELF;
xatp.idx = 0;
@@ -96,6 +96,11 @@ static int __devinit init_xen_info(void)
ioremap(shared_info_frame << PAGE_SHIFT, PAGE_SIZE);
if (shared_info_area == NULL)
panic("can't map shared info\n");
+#else
+ shared_info_frame = __pa(shared_info_area) >> PAGE_SHIFT;
+ printk(KERN_INFO "Using kernel provided shared info (pfn=%lx)\n",
+ shared_info_frame);
+#endif
return 0;
}
Index: xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.h
===================================================================
--- xen-4.2.0-testing.orig/unmodified_drivers/linux-2.6/platform-pci/platform-pci.h
+++ xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.h
@@ -27,6 +27,11 @@
unsigned long alloc_xen_mmio(unsigned long len);
void platform_pci_resume(void);
+#ifdef CONFIG_ENLIGHTEN_SPINLOCKS
+#define shared_info_area xen_shared_info
+#endif
+extern void *shared_info_area;
+
extern struct pci_dev *xen_platform_pdev;
#endif /* _XEN_PLATFORM_PCI_H */

View File

@ -1,7 +1,5 @@
Index: xen-4.3.0-testing/xen/arch/x86/platform_hypercall.c
===================================================================
--- xen-4.3.0-testing.orig/xen/arch/x86/platform_hypercall.c
+++ xen-4.3.0-testing/xen/arch/x86/platform_hypercall.c
--- a/xen/arch/x86/platform_hypercall.c
+++ b/xen/arch/x86/platform_hypercall.c
@@ -25,7 +25,7 @@
#include <xen/irq.h>
#include <asm/current.h>
@ -45,7 +43,7 @@ Index: xen-4.3.0-testing/xen/arch/x86/platform_hypercall.c
+ op->u.get_cpu_freq.freq = 0;
+ break;
+ }
+ if ( copy_field_to_guest(u_xenpf_op, op, u.get_cpu_freq.freq) )
+ if ( __copy_field_to_guest(u_xenpf_op, op, u.get_cpu_freq.freq) )
+ ret = -EFAULT;
+ }
+ break;
@ -53,10 +51,8 @@ Index: xen-4.3.0-testing/xen/arch/x86/platform_hypercall.c
default:
ret = -ENOSYS;
break;
Index: xen-4.3.0-testing/xen/include/public/platform.h
===================================================================
--- xen-4.3.0-testing.orig/xen/include/public/platform.h
+++ xen-4.3.0-testing/xen/include/public/platform.h
--- a/xen/include/public/platform.h
+++ b/xen/include/public/platform.h
@@ -527,6 +527,16 @@ struct xenpf_core_parking {
typedef struct xenpf_core_parking xenpf_core_parking_t;
DEFINE_XEN_GUEST_HANDLE(xenpf_core_parking_t);

View File

@ -1,3 +1,19 @@
-------------------------------------------------------------------
Fri Jul 12 11:05:11 MDT 2013 - carnold@suse.com
- Upstream patches from Jan
51d277a3-x86-don-t-pass-negative-time-to-gtime_to_gtsc-try-2.patch
51d27807-iommu-amd-Fix-logic-for-clearing-the-IOMMU-interrupt-bits.patch
51d27841-iommu-amd-Workaround-for-erratum-787.patch
51daa074-Revert-hvmloader-always-include-HPET-table.patch
-------------------------------------------------------------------
Fri Jul 12 09:31:01 MDT 2013 - carnold@suse.com
- Dropped deprecated or unnecessary patches
pvdrv-import-shared-info.patch
minios-fixups.patch
-------------------------------------------------------------------
Tue Jul 9 13:06:27 MDT 2013 - carnold@suse.com

View File

@ -9,10 +9,8 @@ Signed-off-by: Olaf Hering <olaf@aepfle.de>
unmodified_drivers/linux-2.6/platform-pci/platform-pci.c | 13 +++++++++++++
1 file changed, 13 insertions(+)
Index: xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
===================================================================
--- xen-4.2.0-testing.orig/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
+++ xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
--- a/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
+++ b/unmodified_drivers/linux-2.6/platform-pci/platform-pci.c
@@ -27,6 +27,7 @@
#include <linux/pci.h>
#include <linux/init.h>
@ -21,7 +19,7 @@ Index: xen-4.2.0-testing/unmodified_drivers/linux-2.6/platform-pci/platform-pci.
#include <linux/interrupt.h>
#include <linux/vmalloc.h>
#include <linux/mm.h>
@@ -477,6 +478,18 @@ static struct pci_device_id platform_pci
@@ -472,6 +473,18 @@ static struct pci_device_id platform_pci
MODULE_DEVICE_TABLE(pci, platform_pci_tbl);

View File

@ -15,7 +15,6 @@
# Please submit bugfixes or comments via http://bugs.opensuse.org/
#
Name: xen
ExclusiveArch: %ix86 x86_64 %arm aarch64
%define xvers 4.3
@ -134,7 +133,7 @@ BuildRequires: xorg-x11
BuildRequires: lndir
%endif
%endif
Version: 4.3.0_08
Version: 4.3.0_07
Release: 0
PreReq: %insserv_prereq %fillup_prereq
Summary: Xen Virtualization: Hypervisor (aka VMM aka Microkernel)
@ -184,6 +183,10 @@ Source99: baselibs.conf
# http://xenbits.xensource.com/ext/xenalyze
Source20000: xenalyze.hg.tar.bz2
# Upstream patches
Patch1: 51d277a3-x86-don-t-pass-negative-time-to-gtime_to_gtsc-try-2.patch
Patch2: 51d27807-iommu-amd-Fix-logic-for-clearing-the-IOMMU-interrupt-bits.patch
Patch3: 51d27841-iommu-amd-Workaround-for-erratum-787.patch
Patch4: 51daa074-Revert-hvmloader-always-include-HPET-table.patch
# Upstream qemu patches
# Our patches
Patch301: xen-destdir.patch
@ -207,9 +210,8 @@ Patch332: xenpaging.doc.patch
# Other bug fixes or features
Patch350: hibernate.patch
Patch351: stdvga-cache.patch
Patch352: minios-fixups.patch
Patch353: ipxe-enable-nics.patch
Patch354: pygrub-netware-xnloader.patch
Patch352: ipxe-enable-nics.patch
Patch353: pygrub-netware-xnloader.patch
Patch360: blktapctrl-close-fifos.patch
Patch361: blktapctrl-default-to-ioemu.patch
Patch362: blktapctrl-disable-debug-printf.patch
@ -220,10 +222,9 @@ Patch502: x86-cpufreq-report.patch
Patch503: x86-dom-print.patch
Patch504: x86-extra-trap-info.patch
Patch520: supported_module.patch
Patch521: pvdrv-import-shared-info.patch
Patch522: magic_ioport_compat.patch
Patch523: xen.sles11sp1.fate311487.xen_platform_pci.dmistring.patch
Patch524: disable_emulated_device.patch
Patch521: magic_ioport_compat.patch
Patch522: xen.sles11sp1.fate311487.xen_platform_pci.dmistring.patch
Patch523: disable_emulated_device.patch
# Legacy Xend and Qemu patches
Patch800: xend-traditional-qemu.patch
# Build patches
@ -595,6 +596,10 @@ Authors
# Upstream patches
# Qemu
# Our patches
%patch1 -p1
%patch2 -p1
%patch3 -p1
%patch4 -p1
%patch301 -p1
%patch302 -p1
%patch303 -p1
@ -616,7 +621,6 @@ Authors
%patch351 -p1
%patch352 -p1
%patch353 -p1
%patch354 -p1
%patch360 -p1
%patch361 -p1
%patch362 -p1
@ -629,7 +633,6 @@ Authors
%patch521 -p1
%patch522 -p1
%patch523 -p1
%patch524 -p1
%patch800 -p1
%patch99997 -p1
%patch99998 -p1
@ -1053,7 +1056,6 @@ rm -f $RPM_BUILD_ROOT/usr/libexec/qemu-bridge-helper
%ifarch x86_64 aarch64
/usr/lib/xen
%endif
%dir /var/adm/fillup-templates
%ifnarch %arm aarch64
/var/adm/fillup-templates/sysconfig.pciback
%endif
@ -1080,7 +1082,6 @@ rm -f $RPM_BUILD_ROOT/usr/libexec/qemu-bridge-helper
%config(noreplace) /etc/xen/xl.conf
%config /etc/pam.d/xen-api
%config /etc/modprobe.d/xen_loop.conf
%dir /etc/init.d
%config /etc/init.d/xencommons
%config /etc/init.d/xendomains
%config /etc/init.d/xen-watchdog
@ -1121,9 +1122,6 @@ rm -f $RPM_BUILD_ROOT/usr/libexec/qemu-bridge-helper
%{_defaultdocdir}/xen/boot.local.xenU
%{_defaultdocdir}/xen/boot.xen
%{_defaultdocdir}/xen/misc
%dir %{_mandir}/man1
%dir %{_mandir}/man5
%dir %{_mandir}/man8
%{_mandir}/man1/xen-list.1.gz
%{_mandir}/man1/xentop.1.gz
%{_mandir}/man1/xentrace_format.1.gz
@ -1154,7 +1152,6 @@ rm -f $RPM_BUILD_ROOT/usr/libexec/qemu-bridge-helper
%dir %{_libdir}/python%{pyver}/site-packages/xen/xend
%dir %{_libdir}/python%{pyver}/site-packages/xen/xm
%dir %{_libdir}/python%{pyver}/site-packages/xen/web
%dir /etc/init.d
%config /etc/init.d/xend
%endif
%dir %attr(700,root,root) /etc/xen
@ -1169,8 +1166,6 @@ rm -f $RPM_BUILD_ROOT/usr/libexec/qemu-bridge-helper
%{_libdir}/python%{pyver}/site-packages/xen/xm/*
%{_libdir}/python%{pyver}/site-packages/xen/web/*
%config %{_fwdefdir}/xend-relocation-server
%dir %{_mandir}/man1
%dir %{_mandir}/man5
%{_mandir}/man1/xm.1.gz
%{_mandir}/man5/xmdomain.cfg.5.gz
%{_mandir}/man5/xend-config.sxp.5.gz