11035112e8
51d277a3-x86-don-t-pass-negative-time-to-gtime_to_gtsc-try-2.patch 51d27807-iommu-amd-Fix-logic-for-clearing-the-IOMMU-interrupt-bits.patch 51d27841-iommu-amd-Workaround-for-erratum-787.patch 51daa074-Revert-hvmloader-always-include-HPET-table.patch - Dropped deprecated or unnecessary patches pvdrv-import-shared-info.patch minios-fixups.patch OBS-URL: https://build.opensuse.org/package/show/Virtualization/xen?expand=0&rev=258
58 lines
2.1 KiB
Diff
58 lines
2.1 KiB
Diff
# Commit 9eabb0735400e2b6059dfa3f0b47a426f61f570a
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# Date 2013-07-02 08:50:41 +0200
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# Author Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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# Committer Jan Beulich <jbeulich@suse.com>
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iommu/amd: Workaround for erratum 787
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The IOMMU interrupt handling in bottom half must clear the PPR log interrupt
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and event log interrupt bits to re-enable the interrupt. This is done by
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writing 1 to the memory mapped register to clear the bit. Due to hardware bug,
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if the driver tries to clear this bit while the IOMMU hardware also setting
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this bit, the conflict will result with the bit being set. If the interrupt
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handling code does not make sure to clear this bit, subsequent changes in the
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event/PPR logs will no longer generating interrupts, and would result if
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buffer overflow. After clearing the bits, the driver must read back
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the register to verify.
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Signed-off-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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Adjust to apply on top of heavily modified patch 1. Adjust flow to get away
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with a single readl() in each instance of the status register checks.
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Signed-off-by: Jan Beulich <jbeulich@suse.com>
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Reviewed-by: Tim Deegan <tim@xen.org>
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Acked-by: Suravee Suthikulpanit <suravee.suthikulpanit@amd.com>
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--- a/xen/drivers/passthrough/amd/iommu_init.c
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+++ b/xen/drivers/passthrough/amd/iommu_init.c
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@@ -636,6 +636,14 @@ static void iommu_check_event_log(struct
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}
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}
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+ /*
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+ * Workaround for erratum787:
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+ * Re-check to make sure the bit has been cleared.
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+ */
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+ entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
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+ if ( entry & IOMMU_STATUS_EVENT_LOG_INT_MASK )
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+ tasklet_schedule(&amd_iommu_irq_tasklet);
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+
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spin_unlock_irqrestore(&iommu->lock, flags);
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}
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@@ -717,6 +725,14 @@ static void iommu_check_ppr_log(struct a
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}
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}
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+ /*
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+ * Workaround for erratum787:
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+ * Re-check to make sure the bit has been cleared.
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+ */
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+ entry = readl(iommu->mmio_base + IOMMU_STATUS_MMIO_OFFSET);
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+ if ( entry & IOMMU_STATUS_PPR_LOG_INT_MASK )
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+ tasklet_schedule(&amd_iommu_irq_tasklet);
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+
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spin_unlock_irqrestore(&iommu->lock, flags);
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}
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