SHA256
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forked from pool/binutils

Accepting request 734652 from devel:gcc

- Add avr, epiphany and rx to target_list so that the common
  binutils can handle all objects we can create with crosses.
  [bsc#1152590]

OBS-URL: https://build.opensuse.org/request/show/734652
OBS-URL: https://build.opensuse.org/package/show/openSUSE:Factory/binutils?expand=0&rev=139
This commit is contained in:
Dominique Leuenberger 2019-10-11 13:09:20 +00:00 committed by Git OBS Bridge
commit be13793a40
46 changed files with 184 additions and 23 deletions

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -61,7 +61,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

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@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#

View File

@ -1,3 +1,10 @@
-------------------------------------------------------------------
Wed Oct 2 12:20:41 UTC 2019 - matz@suse.com
- Add avr, epiphany and rx to target_list so that the common
binutils can handle all objects we can create with crosses.
[bsc#1152590]
-------------------------------------------------------------------
Mon Sep 9 17:19:56 UTC 2019 - matz@suse.com

View File

@ -64,7 +64,7 @@ Release: 0
%else
%define build_multitarget 0
%endif
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 s390 s390x sh4 sparc sparc64 x86_64 xtensa
%define target_list aarch64 alpha armv5l armv6l armv7l armv8l avr epiphany hppa hppa64 i686 ia64 m68k mips powerpc powerpc64 powerpc64le riscv64 rx s390 s390x sh4 sparc sparc64 x86_64 xtensa
#
#
#