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1 recommended fixe from upstream:

Browse Source 
- dmidecode-fix-system-slot-information-for-pcie-ssd.patch: Fix
  System Slot Information for PCIe SSD.
Partial support for SMBIOS 3.3.0:
- dmidecode-add-enumerated-values-from-smbios-3.3.0.patch: Add
  enumerated values from SMBIOS 3.3.0 (bsc#1153533).

OBS-URL: https://build.opensuse.org/package/show/Base:System/dmidecode?expand=0&rev=54
This commit is contained in:
Jean Delvare 2019-10-23 13:34:54 +00:00 committed by Git OBS Bridge
parent 533abc8563
commit f308d382bd
6 changed files with 186 additions and 4 deletions
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133
dmidecode-add-enumerated-values-from-smbios-3.3.0.patch Normal file
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@ -0,0 +1,133 @@
From: Jean Delvare <jdelvare@suse.de>
Date: Wed, 23 Oct 2019 12:44:13 +0200
Subject: dmidecode: Add enumerated values from SMBIOS 3.3.0
Git-commit: 3fa833fd78ff5eb74f9459e061e26e063ed648d5
Patch-mainline: yes
References: bsc#1153533
Add all the enumerated values from the SMBIOS 3.3.0 specification
update that was released last month.
Signed-off-by: Jean Delvare <jdelvare@suse.de>
Reviewed-by: Jerry Hoemann <jerry.hoemann@hpe.com>
---
dmidecode.c | 44 +++++++++++++++++++++++++++++++++++---------
1 file changed, 35 insertions(+), 9 deletions(-)
--- a/dmidecode.c
+++ b/dmidecode.c
@@ -932,6 +932,10 @@ static const char *dmi_processor_family(
{ 0x140, "WinChip" },
{ 0x15E, "DSP" },
{ 0x1F4, "Video Processor" },
+
+ { 0x200, "RV32" },
+ { 0x201, "RV64" },
+ { 0x202, "RV128" },
};
/*
* Note to developers: when adding entries to this list, check if
@@ -1815,6 +1819,9 @@ static const char *dmi_slot_type(u8 code
"PCI Express Mini 52-pin without bottom-side keep-outs",
"PCI Express Mini 76-pin" /* 0x23 */
};
+ static const char *type_0x30[] = {
+ "CXL FLexbus 1.0" /* 0x30 */
+ };
static const char *type_0xA0[] = {
"PC-98/C20", /* 0xA0 */
"PC-98/C24",
@@ -1838,7 +1845,14 @@ static const char *dmi_slot_type(u8 code
"PCI Express 3 x2",
"PCI Express 3 x4",
"PCI Express 3 x8",
- "PCI Express 3 x16" /* 0xB6 */
+ "PCI Express 3 x16",
+ out_of_spec, /* 0xB7 */
+ "PCI Express 4",
+ "PCI Express 4 x1",
+ "PCI Express 4 x2",
+ "PCI Express 4 x4",
+ "PCI Express 4 x8",
+ "PCI Express 4 x16" /* 0xBD */
};
/*
* Note to developers: when adding entries to these lists, check if
@@ -1847,7 +1861,9 @@ static const char *dmi_slot_type(u8 code
if (code >= 0x01 && code <= 0x23)
return type[code - 0x01];
- if (code >= 0xA0 && code <= 0xB6)
+ if (code == 0x30)
+ return type_0x30[code - 0x30];
+ if (code >= 0xA0 && code <= 0xBD)
return type_0xA0[code - 0xA0];
return out_of_spec;
}
@@ -1951,6 +1967,12 @@ static void dmi_slot_id(u8 code1, u8 cod
case 0xB4: /* PCI Express 3 */
case 0xB5: /* PCI Express 3 */
case 0xB6: /* PCI Express 3 */
+ case 0xB8: /* PCI Express 4 */
+ case 0xB9: /* PCI Express 4 */
+ case 0xBA: /* PCI Express 4 */
+ case 0xBB: /* PCI Express 4 */
+ case 0xBC: /* PCI Express 4 */
+ case 0xBD: /* PCI Express 4 */
printf("%sID: %u\n", prefix, code1);
break;
case 0x07: /* PCMCIA */
@@ -2292,12 +2314,13 @@ static const char *dmi_memory_array_loca
"PC-98/C20 Add-on Card", /* 0xA0 */
"PC-98/C24 Add-on Card",
"PC-98/E Add-on Card",
- "PC-98/Local Bus Add-on Card" /* 0xA3 */
+ "PC-98/Local Bus Add-on Card",
+ "CXL Flexbus 1.0" /* 0xA4 */
};
if (code >= 0x01 && code <= 0x0A)
return location[code - 0x01];
- if (code >= 0xA0 && code <= 0xA3)
+ if (code >= 0xA0 && code <= 0xA4)
return location_0xA0[code - 0xA0];
return out_of_spec;
}
@@ -2420,10 +2443,11 @@ static const char *dmi_memory_device_for
"RIMM",
"SODIMM",
"SRIMM",
- "FB-DIMM" /* 0x0F */
+ "FB-DIMM",
+ "Die" /* 0x10 */
};
- if (code >= 0x01 && code <= 0x0F)
+ if (code >= 0x01 && code <= 0x10)
return form_factor[code - 0x01];
return out_of_spec;
}
@@ -2472,10 +2496,12 @@ static const char *dmi_memory_device_typ
"LPDDR2",
"LPDDR3",
"LPDDR4",
- "Logical non-volatile device" /* 0x1F */
+ "Logical non-volatile device",
+ "HBM",
+ "HBM2" /* 0x21 */
};
- if (code >= 0x01 && code <= 0x1F)
+ if (code >= 0x01 && code <= 0x21)
return type[code - 0x01];
return out_of_spec;
}
@@ -2531,7 +2557,7 @@ static void dmi_memory_technology(u8 cod
"NVDIMM-N",
"NVDIMM-F",
"NVDIMM-P",
- "Intel persistent memory" /* 0x07 */
+ "Intel Optane DC persistent memory" /* 0x07 */
};
if (code >= 0x01 && code <= 0x07)
printf(" %s", technology[code - 0x01]);

5
dmidecode-fix-formatting-of-tpm-table-output.patch
View File

@ -1,7 +1,8 @@
From 1d0db85949a5bdd96375f6131d393a11204302a6 Mon Sep 17 00:00:00 2001
From: Deomid rojer Ryabkov <rojer9@fb.com>
Date: Mon, 26 Aug 2019 14:20:15 +0200
Subject: [PATCH] Fix formatting of TPM table output
Subject: Fix formatting of TPM table output
Git-commit: 1d0db85949a5bdd96375f6131d393a11204302a6
Patch-mainline: yes
Added missing newlines.

32
dmidecode-fix-system-slot-information-for-pcie-ssd.patch Normal file
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@ -0,0 +1,32 @@
From: Prabhakar pujeri <Prabhakar.Pujeri@dell.com>
Date: Tue, 15 Oct 2019 14:24:46 +0200
Subject: dmidecode: Fix System Slot Information for PCIe SSD
Git-commit: fd08479625b5845e4d725ab628628f7ebfccc407
Patch-mainline: yes
Output for type 9 show <out of spec> for PCIe SSD. SMBIOS spec table
48 describes 2.5" and 3.5" PCIe SSD formats.
Signed-off-by: Prabhakar pujeri <prabhakar.pujeri@dell.com>
Signed-off-by: Jean Delvare <jdelvare@suse.de>
---
dmidecode.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
--- a/dmidecode.c
+++ b/dmidecode.c
@@ -1900,10 +1900,12 @@ static const char *dmi_slot_length(u8 co
"Other", /* 0x01 */
"Unknown",
"Short",
- "Long" /* 0x04 */
+ "Long",
+ "2.5\" drive form factor",
+ "3.5\" drive form factor" /* 0x06 */
};
- if (code >= 0x01 && code <= 0x04)
+ if (code >= 0x01 && code <= 0x06)
return length[code - 0x01];
return out_of_spec;
}

5
dmidecode-only-scan-dev-mem-for-entry-point-on-x86.patch
View File

@ -1,7 +1,8 @@
From e12ec26e19e02281d3e7258c3aabb88a5cf5ec1d Mon Sep 17 00:00:00 2001
From: Jean Delvare <jdelvare@suse.de>
Date: Mon, 26 Aug 2019 14:20:15 +0200
Subject: [PATCH] dmidecode: Only scan /dev/mem for entry point on x86
Subject: dmidecode: Only scan /dev/mem for entry point on x86
Git-commit: e12ec26e19e02281d3e7258c3aabb88a5cf5ec1d
Patch-mainline: yes
x86 is the only architecture which can have a DMI entry point scanned
from /dev/mem. Do not attempt it on other architectures, because not

11
dmidecode.changes
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@ -1,3 +1,14 @@
-------------------------------------------------------------------
Wed Oct 23 13:31:26 UTC 2019 - Jean Delvare <jdelvare@suse.de>
1 recommended fixe from upstream:
- dmidecode-fix-system-slot-information-for-pcie-ssd.patch: Fix
System Slot Information for PCIe SSD.
Partial support for SMBIOS 3.3.0:
- dmidecode-add-enumerated-values-from-smbios-3.3.0.patch: Add
enumerated values from SMBIOS 3.3.0 (bsc#1153533).
-------------------------------------------------------------------
Mon Aug 26 12:35:42 UTC 2019 - Jean Delvare <jdelvare@suse.de>

4
dmidecode.spec
View File

@ -31,6 +31,8 @@ Patch1: dmidecode-fix-redfish-hostname-print-length.patch
Patch2: dmidecode-add-logical-non-volatile-device.patch
Patch3: dmidecode-only-scan-dev-mem-for-entry-point-on-x86.patch
Patch4: dmidecode-fix-formatting-of-tpm-table-output.patch
Patch5: dmidecode-fix-system-slot-information-for-pcie-ssd.patch
Patch6: dmidecode-add-enumerated-values-from-smbios-3.3.0.patch
Provides: pmtools:%{_sbindir}/dmidecode
Obsoletes: pmtools < 20071117
BuildRoot: %{_tmppath}/%{name}-%{version}-build
@ -57,6 +59,8 @@ the BIOS told it to.
%patch2 -p1
%patch3 -p1
%patch4 -p1
%patch5 -p1
%patch6 -p1
%build
make CFLAGS="%{optflags}" %{?_smp_mflags}