forked from pool/libqt5-qtwebengine
30 lines
1.2 KiB
Diff
30 lines
1.2 KiB
Diff
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From: Fabian Vogt <fabian@ritter-vogt.de>
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Subject: Fix build on non-MP ARM archs
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References: boo#1064535
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The ARM ISA before armv6k does not have a yield instruction.
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Index: qtwebengine-opensource-src-5.9.1/src/3rdparty/chromium/third_party/WebKit/Source/wtf/SpinLock.cpp
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===================================================================
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--- qtwebengine-opensource-src-5.9.1.orig/src/3rdparty/chromium/third_party/WebKit/Source/wtf/SpinLock.cpp
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+++ qtwebengine-opensource-src-5.9.1/src/3rdparty/chromium/third_party/WebKit/Source/wtf/SpinLock.cpp
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@@ -29,7 +29,17 @@
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#elif COMPILER(GCC) || COMPILER(CLANG)
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#if CPU(X86_64) || CPU(X86)
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#define YIELD_PROCESSOR __asm__ __volatile__("pause")
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-#elif CPU(ARM) || CPU(ARM64)
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+#elif (defined(_ARM_ARCH_6K__) || \
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+ defined(_ARM_ARCH_6Z__) || \
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+ defined(_ARM_ARCH_6ZK__) || \
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+ defined(__ARM_ARCH_6T2__) || \
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+ defined(__ARM_ARCH_7__) || \
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+ defined(__ARM_ARCH_7A__) || \
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+ defined(__ARM_ARCH_7R__) || \
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+ defined(__ARM_ARCH_7M__) || \
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+ defined(__ARM_ARCH_7S__) || \
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+ defined(__ARM_ARCH_8A__) || \
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+ defined(__aarch64__))
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#define YIELD_PROCESSOR __asm__ __volatile__("yield")
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#elif CPU(MIPS)
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// The MIPS32 docs state that the PAUSE instruction is a no-op on older
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