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libqt5-qtwebengine/spinlock-armv6.patch

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1.2 KiB
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From: Fabian Vogt <fabian@ritter-vogt.de>
Subject: Fix build on non-MP ARM archs
References: boo#1064535
The ARM ISA before armv6k does not have a yield instruction.
Index: qtwebengine-opensource-src-5.9.1/src/3rdparty/chromium/third_party/WebKit/Source/wtf/SpinLock.cpp
===================================================================
--- qtwebengine-opensource-src-5.9.1.orig/src/3rdparty/chromium/third_party/WebKit/Source/wtf/SpinLock.cpp
+++ qtwebengine-opensource-src-5.9.1/src/3rdparty/chromium/third_party/WebKit/Source/wtf/SpinLock.cpp
@@ -29,7 +29,17 @@
#elif COMPILER(GCC) || COMPILER(CLANG)
#if CPU(X86_64) || CPU(X86)
#define YIELD_PROCESSOR __asm__ __volatile__("pause")
-#elif CPU(ARM) || CPU(ARM64)
+#elif (defined(_ARM_ARCH_6K__) || \
+ defined(_ARM_ARCH_6Z__) || \
+ defined(_ARM_ARCH_6ZK__) || \
+ defined(__ARM_ARCH_6T2__) || \
+ defined(__ARM_ARCH_7__) || \
+ defined(__ARM_ARCH_7A__) || \
+ defined(__ARM_ARCH_7R__) || \
+ defined(__ARM_ARCH_7M__) || \
+ defined(__ARM_ARCH_7S__) || \
+ defined(__ARM_ARCH_8A__) || \
+ defined(__aarch64__))
#define YIELD_PROCESSOR __asm__ __volatile__("yield")
#elif CPU(MIPS)
// The MIPS32 docs state that the PAUSE instruction is a no-op on older