forked from pool/u-boot
92 lines
2.8 KiB
Diff
92 lines
2.8 KiB
Diff
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From 9a5ce738148019ec53d4d66bfd53a17128fb2ff1 Mon Sep 17 00:00:00 2001
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From: "Ivan T. Ivanov" <iivanov@suse.de>
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Date: Thu, 14 Dec 2023 09:25:49 +0100
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Subject: [PATCH] pci: pcie-brcmstb: Add bcm2712 PCIe controller support
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PCIe controller have minor register map difference compared
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to bcm2711 variant. Handle this using device specific register
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offset.
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Signed-off-by: Ivan T. Ivanov <iivanov@suse.de>
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---
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drivers/pci/pcie_brcmstb.c | 23 +++++++++++++++++++----
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1 file changed, 19 insertions(+), 4 deletions(-)
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diff --git a/drivers/pci/pcie_brcmstb.c b/drivers/pci/pcie_brcmstb.c
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index cd45f0bee9..d63e715b2e 100644
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--- a/drivers/pci/pcie_brcmstb.c
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+++ b/drivers/pci/pcie_brcmstb.c
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@@ -90,7 +90,6 @@
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#define PCIE_MEM_WIN0_LIMIT_HI(win) \
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PCIE_MISC_CPU_2_PCIE_MEM_WIN0_LIMIT_HI + ((win) * 8)
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-#define PCIE_MISC_HARD_PCIE_HARD_DEBUG 0x4204
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#define PCIE_HARD_DEBUG_SERDES_IDDQ_MASK 0x08000000
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#define PCIE_MSI_INTR2_CLR 0x4508
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@@ -131,6 +130,10 @@
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#define SSC_STATUS_PLL_LOCK_MASK 0x800
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#define SSC_STATUS_PLL_LOCK_SHIFT 11
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+struct pcie_cfg_data {
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+ unsigned long hard_debug_offs;
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+};
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+
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/**
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* struct brcm_pcie - the PCIe controller state
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* @base: Base address of memory mapped IO registers of the controller
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@@ -141,6 +144,7 @@
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struct brcm_pcie {
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void __iomem *base;
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+ struct pcie_cfg_data *cfg;
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int gen;
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bool ssc;
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};
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@@ -458,7 +462,7 @@ static int brcm_pcie_probe(struct udevice *dev)
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/* Take the bridge out of reset */
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clrbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_INIT_MASK);
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- clrbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
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+ clrbits_le32(base + pcie->cfg->hard_debug_offs,
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PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
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/* Wait for SerDes to be stable */
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@@ -599,7 +603,7 @@ static int brcm_pcie_remove(struct udevice *dev)
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setbits_le32(base + PCIE_RGR1_SW_INIT_1, RGR1_SW_INIT_1_PERST_MASK);
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/* Turn off SerDes */
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- setbits_le32(base + PCIE_MISC_HARD_PCIE_HARD_DEBUG,
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+ setbits_le32(base + pcie->cfg->hard_debug_offs,
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PCIE_HARD_DEBUG_SERDES_IDDQ_MASK);
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/* Shutdown bridge */
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@@ -620,6 +624,8 @@ static int brcm_pcie_of_to_plat(struct udevice *dev)
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if (!pcie->base)
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return -EINVAL;
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+ pcie->cfg = (struct pcie_cfg_data *)dev_get_driver_data(dev);
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+
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pcie->ssc = ofnode_read_bool(dn, "brcm,enable-ssc");
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ret = ofnode_read_u32(dn, "max-link-speed", &max_link_speed);
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@@ -636,8 +642,17 @@ static const struct dm_pci_ops brcm_pcie_ops = {
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.write_config = brcm_pcie_write_config,
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};
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+static const struct pcie_cfg_data bcm2711_cfg = {
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+ .hard_debug_offs = 0x4204
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+};
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+
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+static const struct pcie_cfg_data bcm2712_cfg = {
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+ .hard_debug_offs = 0x4304
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+};
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+
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static const struct udevice_id brcm_pcie_ids[] = {
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- { .compatible = "brcm,bcm2711-pcie" },
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+ { .compatible = "brcm,bcm2711-pcie", .data = (ulong)&bcm2711_cfg },
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+ { .compatible = "brcm,bcm2712-pcie", .data = (ulong)&bcm2712_cfg },
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{ }
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};
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