cpuid.changes

@@ -1,3 +1,48 @@
+-------------------------------------------------------------------
+Wed Oct 16 12:19:15 UTC 2024 - Valentin Lefebvre <valentin.lefebvre@suse.com>
+
+- Update to release 20240916
+  * cpuid.c: Updated AMD Zen 3/4/5 die processes with specific TSMC nodes,
+    where known & consistent.  (Earlier generations appear to be a mix of
+    GloFo & TSMC.)
+  * cpuid.c: Updated AMD Instinct MI300 CPUs to MI300A/C.
+  * cpuid.c: Based on LLVM patch from AMD's Ganesh Gopalasubramanian:
+  * cpuid.c: Added numerous early AMD core names for Zen 5.
+  * cpuid.c: Updated AMD 4700S Desktop Kit from Oberon, the GPU name, to
+    Cardinal, the CPU core name.
+  * cpuid.c: Added AMD 4800S Desktop Kit ProjectX core name.
+  * cpuid.c: Fixed a warning about a potential buffer overflow in
+    decode_synth_amd detected by gcc at -O2 (detected via an
+    interprocedural optimaztion, I think).
+  * Made new release.
+  * cpuid.c: For (0,6),(11,14),0 Intel N-Series, add Twin Lake core
+    name.  It can only be distinguished with MSR IA32_PLATFORM_ID (17h) --
+    or by brand name (which would be unreliable if new brandings appear).
+  * cpuid.c: For (synth) decoding of VIA (0,7),(5,11), removed Zhaoxin
+    KaiXian KX-7000 possibility, based on findings that those likely are
+    rebadged Intel CPUs instead.
+  * cpuid.c: In decode_uarch_intel(), for Jintide Gen1, used family field
+    to indicate that they're based on Intel Skylake.
+  * cpuid.c: In decode_uarch_via(), for ZhangJiang CPU's, used family
+    field to to indicate that they're based on VIA C7.  Did not provide a
+    family for WuDaoKou or LuJiaZui, because it isn't clear how far
+    they have diverged.
+  * cpuid.c: Changed comments after 743844-012 corrects (0,6),(11,15),5
+    to be stepping H0.
+  * cpuid.c: In decode_uarch_hygon(), widened Moksha name to include
+    all of Hygon family (9,15).  Based on Jinke F. patch to perfmon2,
+    which applies the name to all of fam18h.
+  * cpuid.c: In decode_uarch_hygon(), used family field to indicate that
+    it's based on AMD Zen.
+  * cpuid.c: Added missing AMD Ryzen numbers: Rembrandt=6000/7000,
+    Mendocino=7000, Raphael=7000, Phoenix=7000/8000, Granite Ridge=9000.
+  * cpuid.c: Updated synth decoding for (0,6),(10,15) to detect
+    Intel Xeon 6 (Sierra Forest) CPUs.
+  * cpuid.c: For (0,6),(8,15),8, add Xeon Scalable (5th Gen).  Some of
+    these have been rebranded from 4th Gen to 5th Gen: LCC U1.
+  * cpuid.c: Added 0x80000007/edx fast CPPC, mentioned in the PPR for
+    Family 19h Model 61h, Revision B1.
+
 -------------------------------------------------------------------
 Mon Aug  5 16:05:55 UTC 2024 - Valentin Lefebvre <valentin.lefebvre@suse.com>
 

cpuid.spec

@@ -17,7 +17,7 @@
 
 
 Name:           cpuid
-Version:        20240716
+Version:        20240916
 Release:        0
 Summary:        x86 CPU identification tool
 License:        GPL-2.0-or-later