Accepting request 175834 from multimedia:libs
Update to 0.4.17 (forwarded request 175783 from dimstar) OBS-URL: https://build.opensuse.org/request/show/175834 OBS-URL: https://build.opensuse.org/package/show/openSUSE:Factory/orc?expand=0&rev=22
This commit is contained in:
commit
5dac1e1425
@ -1,20 +0,0 @@
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--- orc/orcrules-altivec.c
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+++ orc/orcrules-altivec.c
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@@ -1141,7 +1141,7 @@ powerpc_rule_cmpltf (OrcCompiler *p, void *user, OrcInstruction *insn)
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int src2 = ORC_SRC_ARG (p, insn, 1);
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int dest = ORC_DEST_ARG (p, insn, 0);
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- powerpc_emit_VXR (p, "vcmpgefp", 0x100001c6, dest, src2, src1, FALSE);
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+ powerpc_emit_VXR (p, "vcmpgtfp", 0x100002c6, dest, src2, src1, FALSE);
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}
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static void
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@@ -1151,7 +1151,7 @@ powerpc_rule_cmplef (OrcCompiler *p, void *user, OrcInstruction *insn)
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int src2 = ORC_SRC_ARG (p, insn, 1);
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int dest = ORC_DEST_ARG (p, insn, 0);
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- powerpc_emit_VXR (p, "vcmpgtfp", 0x100002c6, dest, src2, src1, FALSE);
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+ powerpc_emit_VXR (p, "vcmpgefp", 0x100001c6, dest, src2, src1, FALSE);
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}
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static void
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@ -1,3 +0,0 @@
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version https://git-lfs.github.com/spec/v1
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oid sha256:700e4edba20a0ed42164b645da26ce515b883d4c4633b222302f1e541f2a58ab
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size 668368
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3
orc-0.4.17.tar.gz
Normal file
3
orc-0.4.17.tar.gz
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@ -0,0 +1,3 @@
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version https://git-lfs.github.com/spec/v1
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oid sha256:4fc7cca48c59fff23afee78fb642cdbde001f56401c8f47b95a16578d1d5d7e8
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size 724990
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17
orc.changes
17
orc.changes
@ -1,3 +1,14 @@
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-------------------------------------------------------------------
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Wed May 15 18:05:56 UTC 2013 - dimstar@opensuse.org
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- Update to version 0.4.17:
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+ Merged known distro patches.
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+ Added MIPS backend.
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+ Disabled ARM backend because of poor coverage.
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+ Added bytecode parsing and writing. This can be used instead of
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manual creation of OrcPrograms.
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- Drop altivec.patch and ppc64.patch: fixed upstream.
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-------------------------------------------------------------------
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Mon Sep 17 17:48:52 UTC 2012 - schwab@linux-m68k.org
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@ -8,17 +19,17 @@ Mon Sep 17 17:48:52 UTC 2012 - schwab@linux-m68k.org
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-------------------------------------------------------------------
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Thu Mar 8 11:58:18 UTC 2012 - idonmez@suse.com
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- Disable check on ARM
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- Disable check on ARM.
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-------------------------------------------------------------------
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Thu Feb 2 12:26:37 UTC 2012 - idonmez@suse.com
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- Fix license to be BSD-3-Clause
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- Fix license to be BSD-3-Clause.
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-------------------------------------------------------------------
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Wed Feb 1 11:09:49 UTC 2012 - dvaleev@suse.com
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- disable check on ppc ppc64
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- disable check on ppc ppc64.
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-------------------------------------------------------------------
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Tue Oct 4 07:47:08 UTC 2011 - vuntz@opensuse.org
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8
orc.spec
8
orc.spec
@ -1,7 +1,7 @@
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#
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# spec file for package orc
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#
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# Copyright (c) 2012 SUSE LINUX Products GmbH, Nuernberg, Germany.
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# Copyright (c) 2013 SUSE LINUX Products GmbH, Nuernberg, Germany.
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# Copyright (c) 2010 Dominique Leuenberger, Amsterdam, Netherlands.
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#
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# All modifications and additions to the file contributed by third parties
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@ -21,13 +21,11 @@ Name: orc
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Summary: The Oil Runtime Compiler
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License: BSD-3-Clause
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Group: Productivity/Multimedia/Other
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Version: 0.4.16
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Version: 0.4.17
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Release: 0
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Url: http://code.entropywave.com/projects/orc/
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Source: http://code.entropywave.com/download/orc/%{name}-%{version}.tar.gz
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Source99: baselibs.conf
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Patch1: ppc64.patch
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Patch2: altivec.patch
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BuildRequires: gtk-doc
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BuildRequires: pkg-config
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Provides: %{name}-devel = %{version}
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@ -64,8 +62,6 @@ arithmetic operations.
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%prep
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%setup -q
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%patch1
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%patch2
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%build
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%configure \
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228
ppc64.patch
228
ppc64.patch
@ -1,228 +0,0 @@
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--- orc/orcpowerpc.c
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+++ orc/orcpowerpc.c
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@@ -150,6 +150,48 @@ powerpc_emit_stwu (OrcCompiler *compiler, int regs, int rega, int offset)
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}
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void
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+powerpc_emit_ld (OrcCompiler *compiler, int regd, int rega, int imm)
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+{
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+ unsigned int insn;
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+
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+ ORC_ASM_CODE(compiler," ld %s, %d(%s)\n",
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+ powerpc_get_regname(regd),
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+ imm, powerpc_get_regname(rega));
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+ insn = (58<<26) | (powerpc_regnum (regd)<<21) | (powerpc_regnum (rega)<<16);
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+ insn |= imm&0xffff;
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+
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+ powerpc_emit (compiler, insn);
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+}
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+
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+void
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+powerpc_emit_std (OrcCompiler *compiler, int regs, int rega, int offset)
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+{
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+ unsigned int insn;
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+
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+ ORC_ASM_CODE(compiler," std %s, %d(%s)\n",
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+ powerpc_get_regname(regs),
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+ offset, powerpc_get_regname(rega));
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+ insn = (62<<26) | (powerpc_regnum (regs)<<21) | (powerpc_regnum (rega)<<16);
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+ insn |= offset&0xffff;
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+
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+ powerpc_emit (compiler, insn);
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+}
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+
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+void
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+powerpc_emit_stdu (OrcCompiler *compiler, int regs, int rega, int offset)
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+{
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+ unsigned int insn;
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+
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+ ORC_ASM_CODE(compiler," stdu %s, %d(%s)\n",
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+ powerpc_get_regname(regs),
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+ offset, powerpc_get_regname(rega));
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+ insn = (62<<26) | (powerpc_regnum (regs)<<21) | (powerpc_regnum (rega)<<16);
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+ insn |= (offset&0xffff) | 1;
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+
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+ powerpc_emit (compiler, insn);
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+}
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+
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+void
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powerpc_emit_srawi (OrcCompiler *compiler, int regd, int rega, int shift,
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int record)
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{
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@@ -381,6 +423,9 @@ orc_powerpc_flush_cache (OrcCode *code)
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int size = code->code_size;
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ptr = code->code;
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+#ifdef __powerpc64__
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+ *(unsigned char **) ptr = (unsigned char *) code->exec + 24;
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+#endif
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for (i=0;i<size;i+=cache_line_size) {
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__asm__ __volatile__ ("dcbst %0,%1" :: "b" (ptr), "r" (i));
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}
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@@ -500,13 +545,23 @@ powerpc_load_long_constant (OrcCompiler *p, int reg, orc_uint32 a,
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powerpc_emit (p, d);
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powerpc_emit_label (p, label_skip);
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- powerpc_emit_lwz (p,
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- greg,
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- POWERPC_R3,
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- (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[ORC_VAR_A2]));
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- powerpc_emit_lwz (p,
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- greg, greg,
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- (int)ORC_STRUCT_OFFSET(OrcCode, exec));
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+ if (p->is_64bit) {
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+ powerpc_emit_ld (p,
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+ greg,
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+ POWERPC_R3,
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+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[ORC_VAR_A2]));
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+ powerpc_emit_ld (p,
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+ greg, greg,
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+ (int)ORC_STRUCT_OFFSET(OrcCode, exec));
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+ } else {
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+ powerpc_emit_lwz (p,
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+ greg,
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+ POWERPC_R3,
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+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[ORC_VAR_A2]));
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+ powerpc_emit_lwz (p,
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+ greg, greg,
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+ (int)ORC_STRUCT_OFFSET(OrcCode, exec));
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+ }
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powerpc_add_fixup (p, 1, p->codeptr, label_data);
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{
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--- orc/orcpowerpc.h
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+++ orc/orcpowerpc.h
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@@ -6,6 +6,10 @@
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ORC_BEGIN_DECLS
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+typedef enum {
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+ ORC_TARGET_POWERPC_64BIT = (1<<0)
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+} OrcTargetPowerPCFlags;
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+
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#ifdef ORC_ENABLE_UNSTABLE_API
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enum {
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@@ -86,6 +90,9 @@ void powerpc_emit_addi (OrcCompiler *compiler, int regd, int rega, int imm);
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void powerpc_emit_lwz (OrcCompiler *compiler, int regd, int rega, int imm);
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void powerpc_emit_stw (OrcCompiler *compiler, int regs, int rega, int offset);
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void powerpc_emit_stwu (OrcCompiler *compiler, int regs, int rega, int offset);
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+void powerpc_emit_ld (OrcCompiler *compiler, int regd, int rega, int imm);
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+void powerpc_emit_std (OrcCompiler *compiler, int regs, int rega, int offset);
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+void powerpc_emit_stdu (OrcCompiler *compiler, int regs, int rega, int offset);
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void powerpc_emit_ret (OrcCompiler *compiler);
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void powerpc_emit_b (OrcCompiler *compiler, int label);
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--- orc/orcprogram-altivec.c
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+++ orc/orcprogram-altivec.c
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@@ -26,7 +26,17 @@ powerpc_emit_prologue (OrcCompiler *compiler)
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ORC_ASM_CODE (compiler, ".global %s\n", compiler->program->name);
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ORC_ASM_CODE (compiler, "%s:\n", compiler->program->name);
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- powerpc_emit_stwu (compiler, POWERPC_R1, POWERPC_R1, -16);
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+ if (compiler->is_64bit) {
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+ ORC_ASM_CODE (compiler, " .quad .%s,.TOC.@tocbase,0\n",
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+ compiler->program->name);
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+ ORC_ASM_CODE (compiler, ".%s:\n", compiler->program->name);
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+ powerpc_emit (compiler, 0); powerpc_emit (compiler, 0);
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+ powerpc_emit (compiler, 0); powerpc_emit (compiler, 0);
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+ powerpc_emit (compiler, 0); powerpc_emit (compiler, 0);
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+ powerpc_emit_stdu (compiler, POWERPC_R1, POWERPC_R1, -16);
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+ } else {
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+ powerpc_emit_stwu (compiler, POWERPC_R1, POWERPC_R1, -16);
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+ }
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for(i=POWERPC_R13;i<=POWERPC_R31;i++){
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if (compiler->used_regs[i]) {
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@@ -82,7 +92,13 @@ orc_powerpc_init (void)
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unsigned int
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orc_compiler_powerpc_get_default_flags (void)
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{
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- return 0;
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+ unsigned int flags = 0;
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+
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+#ifdef __powerpc64__
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+ flags |= ORC_TARGET_POWERPC_64BIT;
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+#endif
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+
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+ return flags;
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}
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void
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@@ -90,6 +106,10 @@ orc_compiler_powerpc_init (OrcCompiler *compiler)
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{
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int i;
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+ if (compiler->target_flags & ORC_TARGET_POWERPC_64BIT) {
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+ compiler->is_64bit = TRUE;
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+ }
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+
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for(i=0;i<32;i++){
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compiler->valid_regs[POWERPC_R0+i] = 1;
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compiler->valid_regs[POWERPC_V0+i] = 1;
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@@ -127,10 +147,17 @@ powerpc_load_inner_constants (OrcCompiler *compiler)
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case ORC_VAR_TYPE_SRC:
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case ORC_VAR_TYPE_DEST:
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if (compiler->vars[i].ptr_register) {
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- powerpc_emit_lwz (compiler,
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- compiler->vars[i].ptr_register,
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- POWERPC_R3,
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- (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[i]));
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+ if (compiler->is_64bit) {
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+ powerpc_emit_ld (compiler,
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+ compiler->vars[i].ptr_register,
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+ POWERPC_R3,
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+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[i]));
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+ } else {
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+ powerpc_emit_lwz (compiler,
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+ compiler->vars[i].ptr_register,
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+ POWERPC_R3,
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+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[i]));
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+ }
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} else {
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/* FIXME */
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ORC_ASM_CODE(compiler,"ERROR");
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@@ -319,10 +346,17 @@ orc_compiler_powerpc_assemble (OrcCompiler *compiler)
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if (compiler->vars[k].vartype == ORC_VAR_TYPE_SRC ||
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compiler->vars[k].vartype == ORC_VAR_TYPE_DEST) {
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if (compiler->vars[k].ptr_register) {
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- powerpc_emit_lwz (compiler,
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- compiler->vars[k].ptr_register,
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- POWERPC_R3,
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- (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
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+ if (compiler->is_64bit) {
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+ powerpc_emit_ld (compiler,
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+ compiler->vars[k].ptr_register,
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+ POWERPC_R3,
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+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
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+ } else {
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+ powerpc_emit_lwz (compiler,
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+ compiler->vars[k].ptr_register,
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+ POWERPC_R3,
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+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
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+ }
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powerpc_emit_lwz (compiler,
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POWERPC_R0,
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POWERPC_R3,
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@@ -331,10 +365,17 @@ orc_compiler_powerpc_assemble (OrcCompiler *compiler)
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compiler->vars[k].ptr_register,
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compiler->vars[k].ptr_register,
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POWERPC_R0);
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- powerpc_emit_stw (compiler,
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- compiler->vars[k].ptr_register,
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- POWERPC_R3,
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- (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
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+ if (compiler->is_64bit) {
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+ powerpc_emit_std (compiler,
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+ compiler->vars[k].ptr_register,
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+ POWERPC_R3,
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+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
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+ } else {
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+ powerpc_emit_stw (compiler,
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+ compiler->vars[k].ptr_register,
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+ POWERPC_R3,
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+ (int)ORC_STRUCT_OFFSET(OrcExecutor, arrays[k]));
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+ }
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} else {
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ORC_ASM_CODE(compiler,"ERROR\n");
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}
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