cpuid 20250513

Signed-off-by: vlefebvre <valentin.lefebvre@suse.com>

cpuid.changes

@@ -1,3 +1,100 @@
+-------------------------------------------------------------------
+Thu Jun  5 19:32:38 UTC 2025 - Jan Engelhardt <jengelh@inai.de>
+
+- Update to release 20250513
+  * DB updates for Intel Alder Lake, Arrow Lake, Twin Lake, Panther
+    Lake, Bartlett Lake, Raptor Cove, Wildcat Lake, Xeon 6 Granite
+    Rapids & Sierra Forest; for Hygon; and for AMD Shimada Peak.
+  * Added MS Hypervisor details, 256BITSGX, EGETKEY256, EREPORT2.
+
+-------------------------------------------------------------------
+Mon Apr  7 14:49:29 UTC 2025 - Valentin Lefebvre <valentin.lefebvre@suse.com>
+
+- Update to release 20250316
+  * cpuid.c: Updated synth decoding for (0,6),(11,6) to mention Atom
+    P6900, name determined from an Intel SA about DSA.  SSG* confirms that
+    Grand Ridge is Crestmont.
+  * cpuid.c: Changed uarch synth for (0,6),(10,15) to Crestmont.  The
+    Sierra Forest name appears only under synth decoding, similar to
+    Meteor Lake & Grand Ridge.
+  * cpuid.c: Added synth decoding for (0,6),(11,7) Xeon E-2400 & Xeon 6300.
+  * cpuid.c: Improved synth decoding for (0,6),(10,15),3 Sierra Forest C0,
+    Xeon 6 6700E-Series.
+  * cpuid.c: Changed synth decoding for (8,15),(9,0-7) Van Gogh to
+    Custom APU: Steam Deck.
+  * cpuid.c: Changed synth decoding for (8,15),(9,8-15) Mero to
+    Custom APU: Magic Leap Demophon.
+  * cpuid.c: Changed synth decoding for (11,15),(1,*) to "5th Gen", and
+    uarch decoding for (11,15),(1,*) to "Zen 5c".
+  * cpuid.c: Changed synth decoding for (10,15),(7,0-7) to be
+    Phoenix/Hawk Point.  For (10,15),(7,5) specifically, instlatx64 has
+    samples: Ryzen 7 8845HS (Hawk Point) and Ryzen 7 8700G (Phoenix).  It
+    may not be possible to differentiate the cases with just cpuid data.
+  * cpuid.c: Added synth decoding for (0,6),(0,9,2) Timna, a canceled
+    precursor to Banias, circa 2000.
+  * cpuid.c: Improved synth decoding for (0,6),(12,5) Arrow Lake-H and its
+    A1 (2) stepping.
+  * cpuid.c: Improved synth decoding for (0,6),(12,6) Arrow Lake-H and its
+    A0/B0 (2) stepping.
+  * cpuid.c: Improved synth decoding for (0,6),(11,5) Arrow Lake-U and its
+    A1 (0) stepping.
+  * cpuid.c: Added AMD PkgType for Ryzen 9000 (11,15),(4,*).
+  * cpuid.man: Added 57896 doc.
+
+-------------------------------------------------------------------
+Fri Mar  7 09:03:43 UTC 2025 - Valentin Lefebvre <valentin.lefebvre@suse.com>
+
+- Update to release 20241023
+  * cpuid.c: Fixed cut&paste error in print_80000025_ebx, possibly
+    resulting in SIGSEGV: cached segments hard limit is only bit 11
+
+-------------------------------------------------------------------
+Wed Oct 23 09:10:23 UTC 2024 - Jan Engelhardt <jengelh@inai.de>
+
+- Update to release 20241021
+  * Recognition for some Intel Arrow Lake-U, Nova Lake, Core
+    200S, Core 200V, Xeon 6 Sierra Forest models.
+  * Removed KaiXian KX-7000.
+
+-------------------------------------------------------------------
+Mon Aug  5 16:05:55 UTC 2024 - Valentin Lefebvre <valentin.lefebvre@suse.com>
+
+- Update to release 20240716
+  * cpuid.c: For AMD Zen CPUs, overhauled uarch & synth decoding to
+    determine the CPU model from only the extended model & high bit of the
+    model field.  Also, determine the stepping (revision) mechanically
+    from the low-order 3 bits of the model and the stepping number.
+    This should correctly identify retail Zen 5 Ryzen's.  This also
+    corrects some stepping bugs from the Zen 1 era.
+- Update to release 20240709
+  * cpuid.c: Added synth decoding for Hygon Dhyana B1 & C2.  Still no
+    information on a uarch name for these.
+  * cpuid.c: Added uarch synth decoding for (0,6),(5,5),11 Cooper Lake.
+    The synth decoding was already present.  Its absence from
+    decode_uarch_intel was just an oversight.
+  * cpuid.c: Fixed division-by-zero error in decode_mp_synth Intel leaf
+    1/4 (zero fallback).  This is meant for old, incomplete cpuid -r
+    dumps, but even for hand-crafted dumps, determining 0 cores and then
+    dividing by that 0 is unacceptable.
+- Update to release 20240330
+  * cpuid.c: Added 0x23/1 sub-header: Architecture Performance Monitoring
+    Extended Counters Supported Bitmaps (0x23/1), and simplified fields.
+  * cpuid.c: Added 0x23/2 sub-header: Architecture Performance Monitoring
+    Extended Auto Counter Reload (ACR) Bitmaps (0x23/2), expanded on
+    existing field descriptions, and added "can cause reloads" fields.
+  * cpuid.c: Added uarch decoding for (11,15),(1,0), which is mentioned
+    with (11,15),(0,0) in the title of 58088 AMD 1Ah Models 00h-0Fh and
+    Models 10h-1Fh ACPI v6.5 Porting Guide.
+  * cpuid.c: Expanded br.xeon test to include brands with "XEON", and
+    br.scalable to include "BRONZE", "PLATINUM", etc. (all caps), based on
+    Emerald Rapids (engr?) sample.  I don't know if this is a change Intel
+    will use moving forward, or a quirk of engr samples, but checking for
+    it is harmless enough.
+- Update to release 20240324
+  * cpuid.c: Updated (0,6),(11,7) to include Core i*-14000.  Some CPUs
+    having this branding, and it's not clear what's different from the
+    Core i*-13000 versions.
+
 -------------------------------------------------------------------
 Wed Jun 21 09:18:20 UTC 2023 - Valentin Lefebvre <valentin.lefebvre@suse.com>
 

cpuid.spec

@@ -1,7 +1,7 @@
 #
 # spec file for package cpuid
 #
-# Copyright (c) 2023 SUSE LLC
+# Copyright (c) 2025 SUSE LLC
 #
 # All modifications and additions to the file contributed by third parties
 # remain the property of their copyright owners, unless otherwise agreed
@@ -17,7 +17,7 @@
 
 
 Name:           cpuid
-Version:        20230614
+Version:        20250513
 Release:        0
 Summary:        x86 CPU identification tool
 License:        GPL-2.0-or-later
@@ -35,7 +35,7 @@ the results into English descriptions. It knows about Intel, AMD, and
 Cyrix CPUs, and is fairly complete.
 
 %prep
-%autosetup
+%autosetup -p1
 
 %build
 # remove -Werror=format-security which is used on Mandriva, as it produces